公开(公告)号：US10664030B2

公开(公告)日：2020-05-26

申请号：US15855790

申请日：2017-12-27

Applicant: QUANTA COMPUTER INC.

Inventor： Jen-Hsuen Huang ,  Fa-Da Lin ,  Yi-Ping Lin

IPC: G06F1/26 ,  G06F1/28 ,  G06F1/3203 ,  G06F1/3206 ,  G06F11/30

Abstract: A system and method to dynamically balance power to a multi-node system is disclosed. A chassis management controller is operable to regulate the power from a power source to each of the nodes. The chassis management controller determines a setting power for each nodes and a real power consumed by each node. The chassis management controller determines a next setting power for each node based on the real power and unused total power and total additional balance power for the plurality of nodes. The chassis management controller commands each node to regulate the power consumption of the node up to the setting power value.

公开(公告)号：US10592462B2

公开(公告)日：2020-03-17

申请号：US16012015

申请日：2018-06-19

Applicant: QUANTA COMPUTER INC.

Inventor： Jen-Hsuen Huang ,  Fa-Da Lin ,  Yi-Ping Lin

IPC: G06F13/40 ,  G06F13/42

Abstract: A computing device configured to detect proper cable assembly to improve assembly and problem diagnosis is provided. The computing device includes a motherboard, a function board, and a middle plane connecting the motherboard and function board. The motherboard includes a baseboard management controller (BMC). The BMC is connected to I2C buses. The function board includes integrated circuits. The middle plane includes cable connections interconnecting the I2C buses that are connected to the BMC and the integrated circuits. The integrated circuits have unique system addresses that are identifiable by the BMC.