公开(公告)号：US11290011B2

公开(公告)日：2022-03-29

申请号：US16884024

申请日：2020-05-26

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Yu-Lung Hung ,  Hsing-Shen Huang

IPC: H02M3/156 ,  H02M1/08

Abstract: A power conversion apparatus includes: a power supply circuit, a load switch and a control circuit. The power supply circuit generates a first power. The load switch controls the power path from the power supply circuit to a load. The control circuit generates a switching control signal to control a conduction level of the load switch according to an enable signal. The control circuit controls a level of the switching control signal to soft start from a first level to a second level. During the soft start period, the switching control signal has plural waveform segments including a first waveform segment and a second waveform segment. A level variation speed of the first waveform segment is higher than a level variation speed of the second waveform segment. The first waveform segment level precedes the second waveform segment level.

公开(公告)号：US11468831B2

公开(公告)日：2022-10-11

申请号：US17575580

申请日：2022-01-13

Applicant: Richtek Technology Corporation

Inventor： Heng-Sheng Chao ,  Jia-Nan Tai ,  Hsing-Shen Huang

IPC: G09G3/32

Abstract: A light emitting device array circuit capable of reducing ghost image includes: a light emitting device array, plural scan line switch circuits, and a driver circuit. The light emitting device array includes plural light emitting devices arranged in plural scan lines and plural data lines. In one frame, plural scan line switch circuits respectively electrically connect plural scan nodes in plural corresponding scan lines to a scan conduction voltage in a non-overlapping sequential order. Data line buffer circuits of the driver circuit provide predetermined dimming levels to corresponding data nodes respectively according to data operation signals. A pre-discharge control amplifier circuit of the driver circuit is coupled to the plural scan nodes and provides a pre-discharge level to at least one predetermined scan node during a predetermined pre-discharge time period according to a pre-discharge signal.

公开(公告)号：US10529295B2

公开(公告)日：2020-01-07

申请号：US15980269

申请日：2018-05-15

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing-Shen Huang

IPC: G09G3/36

Abstract: A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.

公开(公告)号：US20180366082A1

公开(公告)日：2018-12-20

申请号：US15980269

申请日：2018-05-15

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Chung Chen ,  Hsing-Shen Huang

IPC: G09G3/36

CPC classification number: G09G3/3674 ,  G09G3/3266 ,  G09G2310/0213 ,  G09G2310/0267 ,  G09G2310/0289 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2330/027 ,  G09G2354/00

Abstract: A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.