Driver circuit supplying positive and negative voltages and control circuit and control method thereof

    公开(公告)号:US10420179B1

    公开(公告)日:2019-09-17

    申请号:US16202184

    申请日:2018-11-28

    IPC分类号: H05B33/08 G05F1/56

    摘要: A driver circuit supplies a positive voltage and a negative voltage to a load. The driver circuit includes: a positive power conversion circuit, coupled to the load, and generating the positive voltage according to an input voltage; a negative power conversion circuit, coupled to the positive power conversion circuit and the load, and generating the negative voltage according to the positive voltage; and a headroom adaptive adjustment circuit, coupled to the positive power conversion circuit and the load, and generating an adjustment signal according to one or more of a load current flowing through the load, the positive voltage Vp and the negative voltage Vn. The adjustment signal is sent to the positive power conversion circuit to adjust a regulation target of the positive voltage.

    POWER CONVERSION APPARATUS AND CONTROL CIRCUIT AND CONTROL METHOD THEREOF

    公开(公告)号:US20210126529A1

    公开(公告)日:2021-04-29

    申请号:US16884024

    申请日:2020-05-26

    IPC分类号: H02M3/156 H02M1/08

    摘要: A power conversion apparatus includes: a power supply circuit, a load switch and a control circuit. The power supply circuit generates a first power. The load switch controls the power path from the power supply circuit to a load. The control circuit generates a switching control signal to control a conduction level of the load switch according to an enable signal. The control circuit controls a level of the switching control signal to soft start from a first level to a second level. During the soft start period, the switching control signal has plural waveform segments including a first waveform segment and a second waveform segment. A level variation speed of the first waveform segment is higher than a level variation speed of the second waveform segment. The first waveform segment level precedes the second waveform segment level.

    Light Emitting Device Array Circuit Capable of Reducing Ghost Image and Driver Circuit and Control Method Thereof

    公开(公告)号:US20220223099A1

    公开(公告)日:2022-07-14

    申请号:US17575580

    申请日:2022-01-13

    IPC分类号: G09G3/32

    摘要: A light emitting device array circuit capable of reducing ghost image includes: a light emitting device array, plural scan line switch circuits, and a driver circuit. The light emitting device array includes plural light emitting devices arranged in plural scan lines and plural data lines. In one frame, plural scan line switch circuits respectively electrically connect plural scan nodes in plural corresponding scan lines to a scan conduction voltage in a non-overlapping sequential order. Data line buffer circuits of the driver circuit provide predetermined dimming levels to corresponding data nodes respectively according to data operation signals. A pre-discharge control amplifier circuit of the driver circuit is coupled to the plural scan nodes and provides a pre-discharge level to at least one predetermined scan node during a predetermined pre-discharge time period according to a pre-discharge signal.

    Display apparatus with testing functions and driving circuit and driving method thereof

    公开(公告)号:US09947283B2

    公开(公告)日:2018-04-17

    申请号:US15217060

    申请日:2016-07-22

    IPC分类号: G06F3/038 G09G5/00 G09G3/36

    CPC分类号: G09G3/3677 G09G2330/12

    摘要: The present invention provides a display apparatus, including: a display panel circuit which includes a panel load line and performs a scanning display operation; and a panel driving circuit. The panel driving circuit determines at least a test phase and a scanning display phase according to a display control signal generated by a timing control circuit, wherein the test phase is a partial time period when the panel driving circuit does not perform the scanning display operation. The panel driving circuit generates a test driving signal on the panel load line, and detects an electronic characteristic of the display panel circuit so as to determine a failure item thereof during the test phase according to a pre-determined test instruction. The panel driving circuit generates a display driving signal on the panel load line for the scanning display operation according to the display control signal during the scanning display phase.

    DIMMING CIRCUIT AND METHOD FOR USE IN DIMMING CONTROL

    公开(公告)号:US20240163987A1

    公开(公告)日:2024-05-16

    申请号:US18458990

    申请日:2023-08-30

    IPC分类号: H05B45/10 H05B45/325

    CPC分类号: H05B45/10 H05B45/325

    摘要: A dimming circuit is configured to generate a dimming signal to control a brightness of a light emitting device. The brightness is correlated with a duty ratio of the dimming signal. The dimming circuit is configured to count a conduction time of the dimming signal according to a programmable period count code and a programmable brightness code, based upon a fundamental frequency, wherein when the conduction time is less than a conduction time lower limit, based upon a down conversion ratio, the dimming circuit reduces a frequency of the dimming signal according to the programmable period count code and the programmable brightness code, wherein the down conversion ratio is greater than 1 to an extent where a dimming conduction time is greater than or equal to a conduction time lower threshold.

    QUICK RESPONSE SWITCHING POWER CONVERTER AND CONVERSION CONTROL CIRCUIT THEREOF

    公开(公告)号:US20230238883A1

    公开(公告)日:2023-07-27

    申请号:US18149677

    申请日:2023-01-04

    IPC分类号: H02M3/158 H02M1/00

    CPC分类号: H02M3/158 H02M1/0025

    摘要: A conversion control circuit controls a power stage circuit of a switching power converter according to a first feedback signal and a second feedback signal, wherein the conversion control circuit includes an error amplifier circuit, a ramp signal generation circuit, a pulse width modulation circuit, and a quick response control circuit. The quick response control circuit performs a quick response control function, wherein the quick response control function includes: comparing the second feedback signal with at least one reference threshold to generate a quick response control signal; and when the second feedback signal crosses the reference threshold, adjusting a slope of a ramp signal according to the quick response control signal to accelerate an increase or decrease of the duty of a PWM signal, thereby accelerating the transient response of the switching power converter.

    Light emitting device array circuit capable of reducing ghost image and driver circuit and control method thereof

    公开(公告)号:US11468831B2

    公开(公告)日:2022-10-11

    申请号:US17575580

    申请日:2022-01-13

    IPC分类号: G09G3/32

    摘要: A light emitting device array circuit capable of reducing ghost image includes: a light emitting device array, plural scan line switch circuits, and a driver circuit. The light emitting device array includes plural light emitting devices arranged in plural scan lines and plural data lines. In one frame, plural scan line switch circuits respectively electrically connect plural scan nodes in plural corresponding scan lines to a scan conduction voltage in a non-overlapping sequential order. Data line buffer circuits of the driver circuit provide predetermined dimming levels to corresponding data nodes respectively according to data operation signals. A pre-discharge control amplifier circuit of the driver circuit is coupled to the plural scan nodes and provides a pre-discharge level to at least one predetermined scan node during a predetermined pre-discharge time period according to a pre-discharge signal.

    Display apparatus and gate-driver on array control circuit thereof

    公开(公告)号:US10529295B2

    公开(公告)日:2020-01-07

    申请号:US15980269

    申请日:2018-05-15

    IPC分类号: G09G3/36

    摘要: A display apparatus includes a timing controller and a gate-driver on array (GOA) control circuit. The timing controller generates a frame synchronization signal. The GOA control circuit is coupled to the timing controller and includes a scan signal management circuit and a level shifter. The scan signal management circuit generates a scan signal management signal according to the frame synchronization signal, a predetermined panel parameter, and an operation clock signal. The scan signal management circuit includes a storage unit which stores the predetermined panel parameter. The level shifter generates a scan control signal according to the scan signal management signal to control a GOA of a display panel circuit. The GOA generates a gate driving signal to control a vertical scan operation of the display panel circuit.