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11.发明授权公开(公告)号：US08726123B2
公开(公告)日：2014-05-13
申请号：US13548462
申请日：2012-07-13
IPC分类号： H03M13/00
CPC分类号： G06F11/10 , G06F11/1008 , G06F21/35 , G06F21/72 , H03M13/05 , H03M13/63 , H04L9/0866 , H04L2209/34
摘要： A bit error corrector includes an aging bit pattern memory operable to store at least one aging bit pattern which conveys aging-related effects within a succession of uncorrected bit patterns, a bit pattern modifier operable to modify a current, uncorrected bit pattern using the at least one aging bit pattern and generate a modified bit pattern, and a bit pattern comparator operable to compare the current uncorrected bit pattern with a corrected bit pattern which is based on the modified bit pattern and determine a corresponding comparative bit pattern. An aging bit pattern determiner is operable to recursively determine a new aging bit pattern based on the at least one aging bit pattern and the comparative bit pattern, and store the new aging bit pattern in the aging bit pattern memory for use during modification of a subsequent uncorrected bit pattern by the bit pattern modifier.
摘要翻译： 位错误校正器包括老化位模式存储器，其可操作以存储在一系列未校正位模式中传达与老化有关的效应的至少一个老化位模式，位模式修改器可操作以使用至少一个修正的未校正位模式 一个老化比特模式并产生修改的比特模式，以及比特模式比较器，用于将当前未校正比特模式与基于修改的比特模式的校正比特模式进行比较，并确定相应的比较比特模式。 老化位模式确定器可操作以基于至少一个老化位模式和比较位模式递归地确定新的老化位模式，并将新的老化位模式存储在老化位模式存储器中，以在后续修改期间使用 未校正的位模式由位模式修改器。
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公开(公告)号：US07451288B2
公开(公告)日：2008-11-11
申请号：US11396211
申请日：2006-03-30
CPC分类号： G06F12/1408
摘要： Apparatus and method for generating an individual key for accessing a predetermined addressable unit of a memory divided into addressable units. The apparatus includes a calculator for calculating a page pre-key based on a page address, a determiner for determining the individual key based on the page pre-key and a unit address, a memory for storing the calculated page pre-key, and a checker for checking whether during a next access to a further predetermined unit to which a further unique address is associated, an already calculated page pre-key exists in a temporary memory, which has been calculated based on a page address of a unique address, which is identical to the page address of the further unique address, and, if so, transmitting the already calculated page pre-key to the determiner by bypassing the calculator, and, if not, transmitting the page address of the further unique address to the calculator.
摘要翻译： 用于产生用于访问分为可寻址单元的存储器的预定可寻址单元的单独密钥的装置和方法。 该装置包括：用于基于页面地址计算页面预设键的计算器，用于基于页面预设键确定个人密钥的确定器和单元地址，用于存储所计算的页面预设键的存储器和 检查器，用于检查在下一次访问与另一唯一地址相关联的另外的预定单元期间是否存在已经计算的页面预密钥，该临时存储器已经基于唯一地址的寻址地址来计算， 与另一唯一地址的页面地址相同，如果是，则通过绕过计算器将已经计算的页面预密钥发送到确定器，如果不是，则将另外的唯一地址的页面地址发送到计算器 。
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公开(公告)号：US20060161610A1
公开(公告)日：2006-07-20
申请号：US11197776
申请日：2005-08-03
申请人： Rainer Goettfert , Berndt Gammel
发明人： Rainer Goettfert , Berndt Gammel
IPC分类号： G06F7/58
CPC分类号： G06F7/582
摘要： A random number generator for generating a sequence of numbers comprises a first shift register with a nonlinear feedback, a first number of memory cells and a first output coupled to the first number of memory cells by a first coupling means. Further, the number generator comprises a similarly constructed second shift register as well as a combiner for combining the first data sequence at the first output and the second data sequence at the second output to obtain the sequence of numbers.
摘要翻译： 用于产生数字序列的随机数发生器包括具有非线性反馈的第一移位寄存器，第一数量的存储器单元和通过第一耦合装置耦合到第一数量的存储器单元的第一输出。 此外，数字发生器包括类似构造的第二移位寄存器以及用于组合第一输出端的第一数据序列和第二输出端的第二数据序列以获得数字序列的组合器。
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公开(公告)号：US20050207207A1
公开(公告)日：2005-09-22
申请号：US11084725
申请日：2005-03-18
申请人： Berndt Gammel , Rainer Goettfert
发明人： Berndt Gammel , Rainer Goettfert
CPC分类号： G06F7/584 , G06F2207/583
摘要： A random number generator includes a plurality of memory cells arranged in a series, a feedback processor for generating a feedback signal and for feeding the feedback signal into one of the memory cells, and a random number outputter formed to combine states of a group of at least two memory cells to obtain an output sequence. Sequences strongly differing from one another, the number of which is greater than the number of memory cells, can be generated by generating several output sequences AF0, AF1, AF2, . . . , AFk by combining states of different memory cells such that a safe and efficient bus encryption is achievable.
摘要翻译： 一种随机数发生器，包括以串联方式排列的多个存储单元，用于产生反馈信号并将反馈信号馈送到存储单元之一的反馈处理器，以及随机数输出器，其形成为将一组at 至少两个存储单元以获得输出序列。 可以通过产生多个输出序列AF＆lt; 0＆gt;，AF＆lt; 1＆lt; 1＆gt;，AF＆lt; SUB> 2 。 。 。 ，通过组合不同存储器单元的状态，使得可实现安全且有效的总线加密。
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15.发明申请Device and method for generating random numbers using a pseudo random number generator 审中-公开使用伪随机数生成器生成随机数的装置和方法公开(公告)号：US20050129247A1
公开(公告)日：2005-06-16
申请号：US11008585
申请日：2004-12-09
申请人： Berndt Gammel , Rainer Goettfert , Holger Sedlak
发明人： Berndt Gammel , Rainer Goettfert , Holger Sedlak
CPC分类号： G06F7/582 , G06Q20/341 , G06Q20/40975 , G07F7/1008
摘要： Device for generating random numbers having a pseudo random number generator, a memory and a sequential controller. The pseudo random number generator generates a deterministic random number sequence after an initialization using an initialization value. The memory stores initialization information, wherein the initialization information is derived from a true random number or corresponds to the true random number. The sequential controller initializes the pseudo random number generator at start-up using the initialization information or the information derived from the initialization information, stores an intermediate state of the pseudo random number generator or information derived from the intermediate state in the memory at a turn-off of the pseudo random number generator, and uses the intermediate state or the information derived from the intermediate state for an initialization of the pseudo random number generator at a renewed start-up.
摘要翻译： 用于产生具有伪随机数发生器，存储器和顺序控制器的随机数的装置。 伪随机数发生器使用初始化值在初始化之后生成确定性随机数序列。 存储器存储初始化信息，其中初始化信息是从真随机数导出的或对应于真随机数。 顺序控制器使用初始化信息或从初始化信息导出的信息在启动时初始化伪随机数生成器，将伪随机数发生器的中间状态或从中间状态导出的信息存储在存储器中， 关闭伪随机数发生器，并且在更新的启动时使用中间状态或从中间状态导出的信息来进行伪随机数发生器的初始化。
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16.发明授权公开(公告)号：US08781114B2
公开(公告)日：2014-07-15
申请号：US11222504
申请日：2005-09-07
申请人： Berndt Gammel , Michael Goessel , Rainer Goettfert
发明人： Berndt Gammel , Michael Goessel , Rainer Goettfert
IPC分类号： H04L9/00
CPC分类号： H04L9/003 , G09C1/00 , H04L9/004 , H04L9/0631
摘要： An apparatus for recognizing a failure in a cryptographic unit, wherein the cryptographic unit includes a determinator for determining an input control signal and an output control signal, with the determinator being formed to determine the input control signal on the basis of an encryption of an input control signal parity of a group of input signals or an input signal of the group of input signals with an encryption number and to determine the output control signal on the basis of an encryption of an output control signal parity of a group of the output signals or an output signal of the group of output signals with the encryption number. Furthermore, the apparatus for recognizing includes an evaluator for evaluating the input control signal and the output control signal to recognize a failure of the cryptographic unit on the basis of a comparison between the input control signal and the output control signal.
摘要翻译： 一种用于识别加密单元中的故障的装置，其中所述密码单元包括用于确定输入控制信号和输出控制信号的确定器，所述确定器被形成为基于输入的加密来确定所述输入控制信号 一组输入信号的控制信号奇偶校验或具有加密号的输入信号组的输入信号，并且基于一组输出信号的输出控制信号奇偶校验的加密来确定输出控制信号，或 具有加密号的输出信号组的输出信号。 此外，用于识别的装置包括用于基于输入控制信号和输出控制信号之间的比较来评估输入控制信号和输出控制信号以评估密码单元的故障的评估器。
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17.发明申请PSEUDO RANDOM NUMBER GENERATOR AND METHOD FOR GENERATING A PSEUDO RANDOM NUMBER BIT SEQUENCE 审中-公开PSEUDO随机数发生器和生成PSEUDO随机数位序列的方法公开(公告)号：US20090204656A1
公开(公告)日：2009-08-13
申请号：US12030665
申请日：2008-02-13
申请人： Rainer Goettfert , Berndt Gammel
发明人： Rainer Goettfert , Berndt Gammel
IPC分类号： G06F7/58
CPC分类号： G06F7/584 , G06F2207/582
摘要： A pseudo random number generator including a plurality of non-singular feedback shift registers each configured to output a bit-sequence. At least a first of the plurality of non-singular feedback shift registers has one or more first cycles of a length less than or equal to two, and a second of the plurality of non-singular feedback shift registers has one or more second cycles of a length less than or equal to two, and the one or more first cycles encompass a first set of one or more of shift-register state vectors 000 . . . , 111 . . . , 010 . . . and 101 . . . and the one or more second cycles encompass a second set of one or more of the shift-register state vectors 000 . . . , 111 . . . , 010 . . . and 101 . . . with the first and the second set being disjoint.
摘要翻译： 一种伪随机数生成器，包括多个非奇异反馈移位寄存器，每个非奇异反馈移位寄存器被配置为输出比特序列。 多个非奇异反馈移位寄存器中的至少第一个具有长度小于或等于2的一个或多个第一周期，并且多个非奇异反馈移位寄存器中的第二个循环具有一个或多个第二周期 长度小于或等于2，并且所述一个或多个第一周期包括移位寄存器状态向量000中的一个或多个的第一组。 。 。 ，111。 。 。 ，010。 。 。 和101。 。 。 并且所述一个或多个第二周期包括移位寄存器状态向量000中的一个或多个的第二组。 。 。 ，111。 。 。 ，010。 。 。 和101。 。 。 第一和第二组是不相交的。
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公开(公告)号：US20070028134A1
公开(公告)日：2007-02-01
申请号：US11444832
申请日：2006-06-01
IPC分类号： G06F11/00
CPC分类号： H04L1/0061 , H04L1/0045 , H04L43/50 , H04L2001/0094
摘要： A communication device for transmitting data to a communication partner device includes a transmitter for transmitting transmit data to the communication partner device, a determiner for determining a check value from the transmit data in accordance with a determination specification, a receiver for receiving a verification value from the communication partner device, and a checker configured to compare the check value with the verification value and to provide a fault indication signal as a function of the comparison.
摘要翻译： 用于向通信对方设备发送数据的通信设备包括：发送器，用于向通信对方设备发送发送数据;确定器，用于根据确定指定从发送数据确定校验值;接收器，用于从 通信伙伴设备和配置为将检查值与验证值进行比较的检查器，并且作为比较的函数提供故障指示信号。
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公开(公告)号：US20060265563A1
公开(公告)日：2006-11-23
申请号：US11396211
申请日：2006-03-30
IPC分类号： G06F12/00
CPC分类号： G06F12/1408
摘要： Apparatus and method for generating an individual key for accessing a predetermined addressable unit of a memory divided into addressable units. The apparatus includes a calculator for calculating a page pre-key based on a page address, a determiner for determining the individual key based on the page pre-key and a unit address, a memory for storing the calculated page pre-key, and a checker for checking whether during a next access to a further predetermined unit to which a further unique address is associated, an already calculated page pre-key exists in a temporary memory, which has been calculated based on a page address of a unique address, which is identical to the page address of the further unique address, and, if so, transmitting the already calculated page pre-key to the determiner by bypassing the calculator, and, if not, transmitting the page address of the further unique address to the calculator.
摘要翻译： 用于生成用于访问分为可寻址单元的存储器的预定可寻址单元的单独密钥的装置和方法。 该装置包括：用于基于页面地址计算页面预设键的计算器，用于基于页面预设键确定个人密钥的确定器和单元地址，用于存储所计算的页面预设键的存储器和 检查器，用于检查在下一次访问与另一唯一地址相关联的另外的预定单元期间是否存在已经计算的页面预密钥，该临时存储器已经基于唯一地址的寻址地址来计算， 与另一唯一地址的页面地址相同，如果是，则通过绕过计算器将已经计算的页面预密钥发送到确定器，如果不是，则将另外的唯一地址的页面地址发送到计算器 。
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20.发明申请公开(公告)号：US20060050875A1
公开(公告)日：2006-03-09
申请号：US11222504
申请日：2005-09-07
申请人： Berndt Gammel , Michael Goessel , Rainer Goettfert
发明人： Berndt Gammel , Michael Goessel , Rainer Goettfert
IPC分类号： H04L9/00
CPC分类号： H04L9/003 , G09C1/00 , H04L9/004 , H04L9/0631
摘要： An apparatus for recognizing a failure in a cryptographic unit, wherein the cryptographic unit includes a determinator for determining an input control signal and an output control signal, with the determinator being formed to determine the input control signal on the basis of an encryption of an input control signal parity of a group of input signals or an input signal of the group of input signals with an encryption number and to determine the output control signal on the basis of an encryption of an output control signal parity of a group of the output signals or an output signal of the group of output signals with the encryption number. Furthermore, the apparatus for recognizing includes an evaluator for evaluating the input control signal and the output control signal to recognize a failure of the cryptographic unit on the basis of a comparison between the input control signal and the output control signal.
摘要翻译： 一种用于识别加密单元中的故障的装置，其中所述密码单元包括用于确定输入控制信号和输出控制信号的确定器，所述确定器被形成为基于输入的加密来确定所述输入控制信号 一组输入信号的控制信号奇偶校验或具有加密号的输入信号组的输入信号，并且基于一组输出信号的输出控制信号奇偶校验的加密来确定输出控制信号，或 具有加密号的输出信号组的输出信号。 此外，用于识别的装置包括用于基于输入控制信号和输出控制信号之间的比较来评估输入控制信号和输出控制信号以评估密码单元的故障的评估器。
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