公开(公告)号：US12225702B2

公开(公告)日：2025-02-11

申请号：US17957826

申请日：2022-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eojin Lee ,  Daeyoung Moon ,  Hoyoung Tang ,  Taehyung Kim

IPC: G11C11/412 ,  G11C8/16 ,  G11C11/419 ,  H10B10/00

Abstract: A dual-port static random access memory (SRAM) cell is provided. The dual-port SRAM cell includes: P-type active patterns that are spaced apart from one another along a first direction, each of the P-type active patterns extending in a second direction perpendicular to the first direction and including at least one transistor. The P-type active patterns include first through sixth P-type active patterns which are sequentially arranged along the first direction. A first cutting area is provided between the second P-type active pattern and a first boundary of the dual-port SRAM cell that extends along the first direction, and a second cutting area is provided between the fifth P-type active pattern and a second boundary that is opposite to the first boundary and extends along the first direction.

公开(公告)号：US11729963B2

公开(公告)日：2023-08-15

申请号：US17331725

申请日：2021-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyokyoung Kim ,  Jamin Koo ,  Jonghyeok Kim ,  Daeyoung Moon

IPC: H01L27/108 ,  H10B12/00 ,  H01L29/423

CPC classification number: H10B12/30 ,  H01L29/4236

Abstract: A semiconductor device includes a substrate including an isolation layer pattern and an active pattern, a buffer insulation layer pattern on the substrate, a polysilicon structure on the active pattern and the buffer insulation layer pattern, the polysilicon structure contacting a portion of the active pattern, and the polysilicon structure extending in a direction parallel to an upper surface of the substrate, a first diffusion barrier layer pattern on an upper surface of the polysilicon structure, the first diffusion barrier layer pattern including polysilicon doped with at least carbon, a second diffusion barrier layer pattern on the first diffusion barrier layer pattern, the second diffusion barrier layer pattern including at least a metal, and a first metal pattern and a first capping layer pattern stacked on the second diffusion barrier layer pattern.

公开(公告)号：US11631677B2

公开(公告)日：2023-04-18

申请号：US17358055

申请日：2021-06-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Daeyoung Moon ,  Jamin Koo ,  Kyuwan Kim ,  Kisoo Park

IPC: H01L27/108

Abstract: A semiconductor memory device includes a device isolation pattern on a substrate to define an active region, a word line in the substrate, to intersect the active region, a first dopant region in the active region as at a first side of the word line, a second dopant region in the active region at a second side of the word line, a bit line connected to the first dopant region and intersecting the word line, a bit line contact connecting the bit line to the first dopant region, a landing pad on the second dopant region, and a storage node contact connecting the landing pad to the second dopant region, the storage node contact including a first portion in contact with the second dopant region, the first portion including a single-crystal silicon, and a second portion on the first portion and including a poly-silicon.

公开(公告)号：US20230113482A1

公开(公告)日：2023-04-13

申请号：US17957826

申请日：2022-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eojin LEE ,  Daeyoung Moon ,  Hoyoung Tang ,  Taehyung Kim

IPC: H01L27/11 ,  G11C11/412 ,  G11C8/16

Abstract: A dual-port static random access memory (SRAM) cell is provided. The dual-port SRAM cell includes: P-type active patterns that are spaced apart from one another along a first direction, each of the P-type active patterns extending in a second direction perpendicular to the first direction and including at least one transistor. The P-type active patterns include first through sixth P-type active patterns which are sequentially arranged along the first direction. A first cutting area is provided between the second P-type active pattern and a first boundary of the dual-port SRAM cell that extends along the first direction, and a second cutting area is provided between the fifth P-type active pattern and a second boundary that is opposite to the first boundary and extends along the first direction.

公开(公告)号：US11183233B2

公开(公告)日：2021-11-23

申请号：US16566002

申请日：2019-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Yeop Baeck ,  Tae-Hyung Kim ,  Daeyoung Moon ,  Dong-Wook Seo ,  Inhak Lee ,  Hyunsu Choi ,  Taejoong Song ,  Jae-Seung Choi ,  Jung-Myung Kang ,  Hoon Kim ,  Jisu Yu ,  Sun-Yung Jang

IPC: G11C11/419 ,  G11C7/08 ,  H01L23/528 ,  H01L27/092 ,  H01L27/11

Abstract: A semiconductor device includes an active area extending in a first direction, a first transistor including a first gate electrode and first source and drain areas disposed on the active area, the first source and drain areas being disposed at opposite sides of the first gate electrode, a second transistor including a second gate electrode and second source and drain areas disposed on the active area, the second source and drain areas being disposed at opposite sides of the second gate electrode, and a third transistor including a third gate electrode and third source and drain areas disposed on the active area, the third source and drain areas being disposed at opposite sides of the third gate electrode, and the first gate electrode, the second gate electrode, and the third gate electrode extending in a second direction different from the first direction. The second transistor is configured to turn on and off, based on an operation mode of the semiconductor device.