公开(公告)号：US20210384239A1

公开(公告)日：2021-12-09

申请号：US17403911

申请日：2021-08-17

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Takayuki Ikeda ,  Yoshiyuki Kurokawa ,  Shintaro Harada ,  Hidetomo Kobayashi ,  Roh Yamamoto ,  Kiyotaka Kimura ,  Takashi Nakagawa ,  Yusuke Negoro

IPC分类号： H01L27/146 ,  H01L27/12 ,  H01L29/786 ,  H04N5/341 ,  H04N5/374 ,  H04N5/3745

摘要： An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.

公开(公告)号：US11101302B2

公开(公告)日：2021-08-24

申请号：US16615156

申请日：2018-05-16

申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

发明人： Takayuki Ikeda ,  Yoshiyuki Kurokawa ,  Shintaro Harada ,  Hidetomo Kobayashi ,  Roh Yamamoto ,  Kiyotaka Kimura ,  Takashi Nakagawa ,  Yusuke Negoro

IPC分类号： H01L27/146 ,  H01L27/12 ,  H01L29/786 ,  H04N5/341 ,  H04N5/374 ,  H04N5/3745

摘要： An imaging device capable of image processing is provided.
The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.

公开(公告)号：US11099814B2

公开(公告)日：2021-08-24

申请号：US15729150

申请日：2017-10-10

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shintaro Harada ,  Yoshiyuki Kurokawa ,  Takeshi Aoki

IPC分类号： G06F7/544 ,  G06N3/063 ,  H01L29/786 ,  G06N3/04

摘要： A semiconductor device capable of performing product-sum operation is provided. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. The semiconductor device retains first analog data and reference analog data in the first memory cell and the second memory cell, respectively. A potential corresponding to second analog data is applied to each of them as a selection signal, whereby current depending on the sum of products of the first analog data and the second analog data is obtained. The offset circuit includes a constant current circuit comprising a transistor and a capacitor. A first terminal of the transistor is electrically connected to a first gate of the transistor and a first terminal of the capacitor. A second gate of the transistor is electrically connected to a second terminal of the capacitor. A voltage between the first terminal and the second gate of the transistor is held in the capacitor, whereby a change in source-drain current of the transistor can be suppressed.