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公开(公告)号：US20250072212A1
公开(公告)日：2025-02-27
申请号：US18723662
申请日：2022-12-15
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Daiki NAKAMURA , Hisao IKEDA , Ryo HATSUMI , Takeya HIROSE , Yosuke TSUKAMOTO
IPC: H10K59/121 , H10K59/35
Abstract: An electronic device with low power consumption is provided. The electronic device includes a first display device and a second display device. The first display device includes a first display portion, and the second display device includes a second display portion. A plurality of first pixels are arranged in the first display portion, and a plurality of second pixels are arranged in the second display portion. The first display device overlaps with the second display device. The second display portion is provided to surround at least part of the first display portion in a plan view. The area occupied by each of the first pixels is smaller than the area occupied by each of the second pixels.
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公开(公告)号：US20250024737A1
公开(公告)日：2025-01-16
申请号：US18712749
申请日：2022-12-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Ryo HATSUMI , Hisao IKEDA , Daiki NAKAMURA , Takeya HIROSE , Yosuke TSUKAMOTO
IPC: H10K59/80 , G02B27/01 , G09G3/3275 , H10K59/65
Abstract: An electronic device with low power consumption is provided. The electronic device includes a first pixel portion and a second pixel portion. A plurality of first pixels are arranged in the first pixel portion. The second pixel portion includes a first region where a plurality of second pixels are arranged and a second region where a plurality of third pixels are arranged. The second region is provided to surround the first region. The first pixel includes a first light-emitting element, the second pixel includes a light-receiving element, and the third pixel includes a second light-emitting element. The area occupied by one of the first pixels is smaller than the area occupied by one of the third pixels.
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公开(公告)号：US20240349579A1
公开(公告)日：2024-10-17
申请号：US18685268
申请日：2022-08-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisao IKEDA , Ryo HATSUMI , Daiki NAKAMURA , Takeya HIROSE
CPC classification number: H10K59/879 , G06V40/1318 , H10K30/87 , H10K39/34 , H10K59/8792 , G06F3/042 , G06F2203/04108
Abstract: A display device having an image capturing function is provided. The display device includes a first pixel and a second pixel. The first pixel includes a light-emitting device. The second pixel includes a light-receiving device and a lens. The light-emitting device and the light-receiving device share an electrode. The lens and the light-receiving device include a region overlapping with each other. The width of the lens is greater than the width of a light-receiving portion of the light-receiving device. The cross-sectional shape of the lens in a thickness direction including an optical axis is a substantial trapezoid. The surface including a leg of the substantially trapezoidal shape has a convex shape. The surface including an upper base of the substantially trapezoidal shape and the light-receiving portion are provided to face each other. The first pixel and the second pixel are provided to be adjacent to each other.
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公开(公告)号：US20220286090A1
公开(公告)日：2022-09-08
申请号：US17607943
申请日：2020-04-27
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Kiyotaka KIMURA , Takeya HIROSE , Hidetomo KOBAYASHI , Takayuki IKEDA
IPC: H03D7/12 , H01L27/108 , H01L27/12 , H01L29/786
Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.
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公开(公告)号：US20250014616A1
公开(公告)日：2025-01-09
申请号：US18894175
申请日：2024-09-24
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takeya HIROSE , Seiichi YONEDA , Takayuki IKEDA , Shunpei YAMAZAKI
IPC: G11C7/16 , G11C11/40 , G11C11/54 , G11C27/02 , H01L29/786
Abstract: A semiconductor device capable of holding analog data is provided. Two holding circuits, two bootstrap circuits, and one source follower circuit are formed with use of four transistors and two capacitors. A memory node is provided in each of the two holding circuits; a data potential is written to one of the memory nodes and a reference potential is written to the other of the memory nodes. At the time of data reading, the potential of the one memory node is increased in one of the bootstrap circuits, and the potential of the other memory node is increased in the other of the bootstrap circuits. A potential difference between the two memory nodes is output by the source follower circuit. With use of the source follower circuit, the output impedance can be reduced.
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Patent Agency Ranking
公开(公告)号：US20240393611A1
公开(公告)日：2024-11-28
申请号：US18797906
申请日：2024-08-08
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Takeya HIROSE , Ryo HATSUMI , Hisao IKEDA , Daiki NAKAMURA , Yosuke TSUKAMOTO
Abstract: An optical device with less influence of stray light is provided. The optical device is thin and includes a half mirror, a first lens, a retardation plate, a reflective polarizing plate, and a second lens. In the optical device, a geometric phase lens which has negative and positive refractive power is used as the first lens, whereby images can be focused after magnified optically. Thus, the optical device can have a wide viewing angle. In the case where stray light occurs due to birefringence of an optical material, negative refractive power of the first lens can prevent the stray light from being focused on the eye direction. Accordingly, image degradation recognized due to stray light can be prevented.
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公开(公告)号：US20230198509A1
公开(公告)日：2023-06-22
申请号：US18008287
申请日：2021-07-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takeya HIROSE , Seiichi YONEDA , Yusuke NEGORO
IPC: H03K3/356
CPC classification number: H03K3/35613 , H01L29/78648
Abstract: A semiconductor device with low power consumption can be provided. The semiconductor device includes a differential circuit and a latch circuit, the differential circuit includes a transistor including an oxide semiconductor in a channel formation region, and the latch circuit includes a transistor including a single semiconductor or a compound semiconductor in a channel formation region. The differential circuit and the latch circuit include an overlap region.
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公开(公告)号：US20230179888A1
公开(公告)日：2023-06-08
申请号：US18008302
申请日：2021-07-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunsuke SATO , Seiichi YONEDA , Yusuke NEGORO , Takeya HIROSE , Shunpei YAMAZAKI
IPC: H04N25/77
CPC classification number: H04N25/77
Abstract: An imaging device that has an image processing function and is capable of operating at high speed is provided. The imaging device has an additional function such as image processing, image data obtained by an imaging operation is binarized in a pixel unit, and a product-sum operation is performed using the binarized data. A memory circuit is provided in the pixel unit and retains a weight coefficient used for the product-sum operation. Thus, an arithmetic operation can be performed without the weight coefficient read from the outside every time, whereby power consumption can be reduced. Furthermore, a pixel circuit, a memory circuit, and the like and a product-sum operation circuit and the like are stacked, so that the lengths of wirings between the circuits can be reduced, and high-speed operation with low power consumption can be performed.
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公开(公告)号：US20210272507A1
公开(公告)日：2021-09-02
申请号：US17257590
申请日：2019-07-10
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takeya HIROSE , Takahiro FUKUTOME
Abstract: Variations in a receiving circuit employing differential signaling are reduced. The receiving circuit converts a first signal and a second signal which are supplied through differential signaling into a third signal which is a single-ended signal and outputs the third signal. The receiving circuit includes an operational amplifier, a first element, a first transistor, and a first circuit. The first element is connected to the first circuit through a first node to which the first transistor is connected. The first signal and the second signal that is the inverse of the first signal are supplied to the operational amplifier. The operational amplifier supplies an output signal to the first element, and a first preset potential is supplied to the first node through the first transistor. A signal including variations of the operational amplifier is stored in the first element in accordance with the first preset potential. The first circuit that is supplied with the first preset potential determines an initial value of the third signal without being influenced by the signal including variations of the operational amplifier.
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公开(公告)号：US20210217891A1
公开(公告)日：2021-07-15
申请号：US17054926
申请日：2019-05-23
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Hidetomo KOBAYASHI , Takayuki IKEDA , Takashi NAKAGAWA , Takeya HIROSE , Shuichi KATSUI
IPC: H01L29/786 , H01L29/66 , H01L27/108 , G11C11/4074 , G11C11/4096
Abstract: A semiconductor device in which the accuracy of arithmetic operation is increased by correction of the threshold voltage of a transistor can be provided. The semiconductor device includes first and second current supply circuits, and the second current supply circuit has the same configuration as the first current supply circuit. The first current supply circuit includes first and second transistors, a first capacitor, and first to third nodes. A first terminal of the first transistor is electrically connected to the first node, and a back gate of the first transistor is electrically connected to a first terminal of the second transistor and a first terminal of the first capacitor. A gate of the first transistor is electrically connected to the second node, and a second terminal of the first capacitor is electrically connected to a second terminal of the first transistor. The first node of the first current supply circuit is electrically connected to a second node of each of the first and second current supply circuits. The threshold voltage of the first transistor is corrected by writing a correction voltage to the back gate of the first transistor.
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