-
公开(公告)号:US09966900B2
公开(公告)日:2018-05-08
申请号:US15238525
申请日:2016-08-16
Applicant: Silicon Laboratories Inc.
Inventor: Marty Pflum , Arup Mukherji , John M. Khoury
IPC: H03K3/03 , H03B5/04 , H03L7/00 , H03B5/36 , H03B27/00 , G06F1/04 , H03B1/00 , H03M3/00 , G01R19/00
CPC classification number: H03B5/04 , G01R19/00 , G06F1/04 , H03B1/00 , H03B5/36 , H03B27/00 , H03L7/00 , H03L7/1976 , H03M3/30
Abstract: An apparatus includes a first oscillator to generate an output signal that has a first frequency. The apparatus further includes a second oscillator to generate an output signal that has a second frequency. The second frequency varies as a function of temperature. The apparatus further includes a controller that counts a number of cycles of the output signal of the second oscillator in order to determine whether to calibrate the first oscillator.
-
公开(公告)号:US12212349B2
公开(公告)日:2025-01-28
申请号:US18474395
申请日:2023-09-26
Applicant: Silicon Laboratories Inc.
Inventor: Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
-
公开(公告)号:US11804862B2
公开(公告)日:2023-10-31
申请号:US17490255
申请日:2021-09-30
Applicant: Silicon Laboratories Inc.
Inventor: Euisoo Yoo , Arup Mukherji , Rangakrishnan Srinivasan , Vitor Pereira , Zhongda Wang , Sriharsha Vasadi
CPC classification number: H04B1/0064 , H03F3/195 , H03H7/38 , H03F2200/294 , H03F2200/451
Abstract: In one embodiment, an integrated circuit includes: a first radio frequency (RF) circuit configured to receive and process a first RF signal having a sub-gigahertz (GHz) frequency to output a first lower frequency signal and to transmit RF signals having the sub-GHz frequency; a second RF circuit configured to receive and process a second RF signal having a frequency of at least substantially 2.4 GHz to output a second lower frequency signal and to transmit RF signals at the at least substantially 2.4 GHz; shared analog circuitry coupled to the first RF circuit and the second RF circuit, the shared analog circuitry to receive at least one of the first RF signal or the second RF signal and output a digital output signal; and a digital circuit coupled to the shared analog circuit, the digital circuit to recover message information from the digital output signal.
-
14.
公开(公告)号:US11387857B2
公开(公告)日:2022-07-12
申请号:US16998740
申请日:2020-08-20
Applicant: Silicon Laboratories Inc.
Inventor: Arup Mukherji , Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
Abstract: A wireless device including a receiver circuit coupled to a radio frequency receiver node, a frequency selective attenuator including an inductor and a first capacitor coupled in series to the radio frequency receiver node, and a second capacitor coupled in parallel with the first capacitor. The first capacitor has a first capacitance based on a blocker frequency and the second capacitor has a second capacitance that linearizes the frequency selective attenuator. A method of linearizing a frequency selective attenuator including detecting presence of a blocker signal, activating and programming a capacitor of the frequency selective attenuator to reduce a strength of the blocker signal, determining a frequency difference between the blocker signal and a receive frequency, and coupling a second capacitor to the frequency selective attenuator to linearize the frequency selective attenuator when the frequency difference is no more than an attenuation threshold.
-
15.
公开(公告)号:US20210175917A1
公开(公告)日:2021-06-10
申请号:US16998740
申请日:2020-08-20
Applicant: Silicon Laboratories Inc.
Inventor: Arup Mukherji , Vitor Pereira , Jeffrey A. Tindle , Mustafa H. Koroglu , Terry Lee Dickey
Abstract: A wireless device including a receiver circuit coupled to a radio frequency receiver node, a frequency selective attenuator including an inductor and a first capacitor coupled in series to the radio frequency receiver node, and a second capacitor coupled in parallel with the first capacitor. The first capacitor has a first capacitance based on a blocker frequency and the second capacitor has a second capacitance that linearizes the frequency selective attenuator. A method of linearizing a frequency selective attenuator including detecting presence of a blocker signal, activating and programming a capacitor of the frequency selective attenuator to reduce a strength of the blocker signal, determining a frequency difference between the blocker signal and a receive frequency, and coupling a second capacitor to the frequency selective attenuator to linearize the frequency selective attenuator when the frequency difference is no more than an attenuation threshold.
-
-
-
-