Efficient, Programmable and Scalable Low Density Parity Check Decoder
    11.
    发明申请
    Efficient, Programmable and Scalable Low Density Parity Check Decoder 有权
    高效,可编程和可扩展的低密度奇偶校验解码器

    公开(公告)号:US20140129894A1

    公开(公告)日:2014-05-08

    申请号:US14070000

    申请日:2013-11-01

    Abstract: Novel design of an LDPC decoder suitable for a range of code-block sizes and bit-rates, also suitable for both ASIC and FPGA implementations, is provided, in which the overhead associated with correction data sent along the transmission channel can be minimized. An LDPC decoder can be optimized for either eIRA based or general H matrices. An H parity matrix can be constructed and/or manipulated to arrange the bit-node message “columns” to facilitate mapping to MPB “columns” and corresponding access via LUT pointer tables to minimize processing cycles so as to: (i) minimize address conflicts within the same MPB that will take multiple access cycles to resolve; (ii) minimize splitting of bit-node messages across MPB “columns” that will take multiple access cycles to resolve; and (iii) balance the bit-node computations across all the MPB/LUT “columns” so that they will complete their computations at nearly the same time.

    Abstract translation: 提供了适用于一系列码块大小和比特率的LDPC解码器的新颖设计,也适用于ASIC和FPGA实现,其中与传输信道发送的校正数据相关联的开销可以最小化。 可以针对基于eIRA或一般H矩阵优化LDPC解码器。 可以构造和/或操纵H奇偶校验矩阵以排列比特节点消息“列”以便于映射到MPB“列”以及经由LUT指针表的对应访问以最小化处理周期,以便:(i)最小化地址冲突 在同一个MPB中,将采取多个访问周期来解决; (ii)最大限度地减少跨越将需要多个访问周期来解决的MPB“列”的位节点消息; 并且(iii)平衡所有MPB / LUT“列”上的位节点计算,使得它们将在几乎相同的时间完成它们的计算。

    Dynamic trigger compensation in OFDM systems

    公开(公告)号:US12166617B2

    公开(公告)日:2024-12-10

    申请号:US18214657

    申请日:2023-06-27

    Abstract: Systems and methods for enabling pre-compensation of timing offsets in OFDM receivers without invalidating channel estimates are described. Timing offset estimations may be sent along with the received OFDM symbols for FFT computation and generating a de-rotated signal output. The timing offset estimation may provide a reference point for dynamic tracking of timing for an OFDM signal and estimated based on an integral value associated with the OFDM signal.

    Overlay modulation technique of COFDM signals based on amplitude offsets

    公开(公告)号:US10063398B2

    公开(公告)日:2018-08-28

    申请号:US15271751

    申请日:2016-09-21

    Abstract: Systems and methods are presented for transmitting additional data over preexisting differential COFDM signals by changing the amplitude of the legacy data symbols. In exemplary embodiments of the present invention, additional data capacity can be achieved for a COFDM signal which is completely backwards compatible with existing legacy satellite broadcast communications systems. In exemplary embodiments of the present invention, additional information can be overlaid on a legacy COFDM signal by applying an amplitude offset to the legacy symbols. In exemplary embodiments of the present invention, special receiver processing can be implemented to extract this additional information, which can include performing channel equalization across frequency bins to isolate the amplitude modulated overlay signal. For example, at each FFT symbol time, average power across neighboring active data bins can be used to determine the localized power at the corresponding FFT bins, and a channel inversion can then, for example, be performed on the data bins to restore, as best as possible, the original transmitted symbol amplitude.

    EFFICIENT, PROGRAMMABLE AND SCALABLE LOW DENSITY PARITY CHECK DECODER
    16.
    发明申请
    EFFICIENT, PROGRAMMABLE AND SCALABLE LOW DENSITY PARITY CHECK DECODER 审中-公开
    高效,可编程和可扩展的低密度奇偶校验解码器

    公开(公告)号:US20160056841A1

    公开(公告)日:2016-02-25

    申请号:US14837026

    申请日:2015-08-27

    Abstract: Novel design of an LDPC decoder suitable for a range of code-block sizes and bit-rates, also suitable for both ASIC and FPGA implementations, is provided, in which the overhead associated with correction data sent along the transmission channel can be minimized. An LDPC decoder can be optimized for either eIRA based or general H matrices. An H parity matrix can be constructed and/or manipulated to arrange the bit-node message “columns” to facilitate mapping to MPB “columns” and corresponding access via LUT pointer tables to minimize processing cycles so as to: (i) minimize address conflicts within the same MPB that will take multiple access cycles to resolve; (ii) minimize splitting of bit-node messages across MPB “columns” that will take multiple access cycles to resolve; and (iii) balance the bit-node computations across all the MPB/LUT “columns” so that they will complete their computations at nearly the same time.

    Abstract translation: 提供了适用于一系列码块大小和比特率的LDPC解码器的新颖设计,也适用于ASIC和FPGA实现,其中与传输信道发送的校正数据相关联的开销可以最小化。 可以针对基于eIRA或一般H矩阵优化LDPC解码器。 可以构造和/或操纵H奇偶校验矩阵以排列比特节点消息“列”以便于映射到MPB“列”以及经由LUT指针表的对应访问以最小化处理周期,以便:(i)最小化地址冲突 在同一个MPB中,将采取多个访问周期来解决; (ii)最大限度地减少跨越将需要多个访问周期来解决的MPB“列”的位节点消息; 并且(iii)平衡所有MPB / LUT“列”上的位节点计算,使得它们将在几乎相同的时间完成它们的计算。

    EFFICIENT IMPLEMENTATION TO PERFORM ITERATIVE DECODING WITH LARGE ITERATION COUNTS
    17.
    发明申请
    EFFICIENT IMPLEMENTATION TO PERFORM ITERATIVE DECODING WITH LARGE ITERATION COUNTS 审中-公开
    高效实施大型迭代计算的迭代解码

    公开(公告)号:US20150188579A1

    公开(公告)日:2015-07-02

    申请号:US14547335

    申请日:2014-11-19

    CPC classification number: H03M13/6505 H03M13/05 H03M13/1105 H03M13/3746

    Abstract: Systems and methods are presented to improve the performance of a constant bit rate iterative decoder by providing elastic buffering, while utilizing a relatively simple decoder architecture capable of maintaining a fixed number of iterations of a lower value. An LDPC decoder can be designed, for example, to support less than the maximum possible number of iterations, and can, for example, be mated to elastic input and output buffers. If a given code block, or succession of code blocks, requires the maximum number of iterations for decoding, the decoder can, for example, run at such maximum number of iterations and the elastic input buffer can, for example, hold code blocks waiting to be processed so as to maintain a constant input rate. Alternatively, if one or more code blocks requires less than the nominal number of iterations, the output buffer can store those code blocks so as to preserve a constant output rate. It is emphasized that this abstract is provided to comply with the rules requiring an abstract, and is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

    Abstract translation: 提出了系统和方法,以通过提供弹性缓冲来提高恒定比特率迭代解码器的性能,同时利用能够维持较低值的固定次数迭代的相对简单的解码器架构。 例如,LDPC解码器可以被设计为支持小于最大可能的迭代次数,并且可以例如与弹性输入和输出缓冲器配合。 如果给定代码块或连续的代码块需要用于解码的最大迭代次数,则解码器可以例如以这样的最大迭代次数运行,并且弹性输入缓冲器可以例如保持等待 进行处理以保持恒定的输入速率。 或者,如果一个或多个代码块需要小于标称的迭代次数,则输出缓冲器可以存储那些代码块,以便保持恒定的输出速率。 要强调的是,提供本摘要以符合要求抽象的规则,并提交了一项谅解,即不会将其用于解释或限制权利要求书的范围或含义。

    Overlay modulation of COFDM using phase and amplitude offset carriers
    18.
    发明授权
    Overlay modulation of COFDM using phase and amplitude offset carriers 有权
    使用相位和幅度偏移载波对COFDM进行叠加调制

    公开(公告)号:US08923429B2

    公开(公告)日:2014-12-30

    申请号:US13646099

    申请日:2012-10-05

    Abstract: Systems and methods are presented for transmitting additional data over preexisting differential COFDM signals by modulating existing data carriers with a phase and an amplitude offset. In exemplary embodiments of the present invention, additional data capacity can be achieved for an COFDM signal which is completely backwards compatible with existing satellite broadcast communications systems. In exemplary embodiments of the present invention additional information can be overlayed on an existing signal as a combination of amplitude and phase offset from the original QPSK symbols, applied for each information bit of the overlay data. With two additional levels of modulation, a receiver can demodulate the information from each of the previous stages and combine the information into a suitable format for soft decoding. The first stage of demodulation will be recovery of overlay data from the amplitude modulated D8PSK. Because other amplitude variations due to multi-path are also expected, the data gathered from the FFT in the receiver must be equalized to the channel conditions. After channel equalization has been performed, soft overlay data can then be derived from the distance off the unit circle. In order to recover the phase modulated overlay data, the equalized symbols must first be differentially demodulated and corrected for any common phase error offset. After common phase removal, overlay phase information can be obtained.

    Abstract translation: 提出了系统和方法,用于通过调制具有相位和幅度偏移的现有数据载波来传输先前存在的差分COFDM信号的附加数据。 在本发明的示例性实施例中,可以实现与现有卫星广播通信系统完全向后兼容的COFDM信号的附加数据容量。 在本发明的示例性实施例中,作为叠加数据的每个信息比特的原始QPSK符号的幅度和相位偏移的组合,附加信息可以叠加在现有信号上。 通过两个附加的调制级别,接收机可以解调来自每个先前阶段的信息,并将该信息组合成用于软解码的适当格式。 解调的第一阶段将是从幅度调制的D8PSK恢复覆盖数据。 由于也预期由于多路径引起的其他幅度变化,所以从接收机中从FFT收集的数据必须与信道条件相等。 在执行信道均衡之后,可以从距离单位圆的距离导出软覆盖数据。 为了恢复相位调制覆盖数据,必须首先对均衡的符号进行差分解调并校正任何公共相位误差偏移。 共相除去后,可以获得覆盖相位信息。

    METHODS AND APPARATUS FOR INTEROPERABLE SATELLITE RADIO RECEIVERS
    19.
    发明申请
    METHODS AND APPARATUS FOR INTEROPERABLE SATELLITE RADIO RECEIVERS 有权
    可互用卫星无线电接收机的方法和装置

    公开(公告)号:US20140213174A1

    公开(公告)日:2014-07-31

    申请号:US14103146

    申请日:2013-12-11

    CPC classification number: H04B7/18513

    Abstract: Methods and apparatus are presented to allow one receiver architecture to be used for the reception of two different SDARS signals. Common receiver functions can be utilized to process each signal, thereby obviating the need to duplicate hardware elements. For example, it can be assumed that both signals will not be received at the same time, thus allowing for considerable hardware reuse and lowering the cost of an interoperable receiver.

    Abstract translation: 提出了方法和装置,以允许一个接收器架构用于接收两个不同的SDARS信号。 可以使用公共接收机功能来处理每个信号,从而避免复制硬件元件的需要。 例如,可以假设两个信号不会同时被接收,从而允许相当大的硬件重用并降低可互操作的接收机的成本。

    METHOD AND APPARATUS FOR INTERLEAVING LOW DENSITY PARITY CHECK (LDPC) CODES OVER MOBILE SATELLITE CHANNELS
    20.
    发明申请
    METHOD AND APPARATUS FOR INTERLEAVING LOW DENSITY PARITY CHECK (LDPC) CODES OVER MOBILE SATELLITE CHANNELS 有权
    用于在移动卫星信道上交换低密度奇偶校验(LDPC)码的方法和装置

    公开(公告)号:US20140189463A1

    公开(公告)日:2014-07-03

    申请号:US14149379

    申请日:2014-01-07

    Abstract: Systems, methods and apparatus are described to interleave LDPC coded data for reception over a mobile communications channel, such as, for example, a satellite channel. In exemplary embodiments of the present invention, a method for channel interleaving includes segmenting a large LDPC code block into smaller codewords, randomly shuffling the code segments of each codeword and then convolutionally interleaving the randomly shuffled code words. In exemplary embodiments of the present invention, such random shuffling can guarantee that no two consecutive input code segments will be closer than a defined minimum number of code segments at the output of the shuffler. In exemplary embodiments of the present invention, by keeping data in, for example, manageable sub-sections, accurate SNR estimations, which are needed for the best possible LDPC decoding performance, can be facilitated based on, for example, iterative bit decisions.

    Abstract translation: 描述了系统,方法和装置来交织用于通过诸如卫星信道的移动通信信道进行接收的LDPC编码数据。 在本发明的示例性实施例中,一种用于信道交织的方法包括将大型LDPC码块分割成较小的码字,随机混洗每个码字的码片段,然后对随机混洗码字进行卷积交织。 在本发明的示例性实施例中,这种随机混洗可以保证在洗牌器的输出处没有两个连续的输入代码段将比规定的最小数量的代码段更接近。 在本发明的示例性实施例中,通过将数据保存在例如可管理子部分中,可以基于例如迭代比特决定来促进针对最佳LDPC解码性能所需的精确SNR估计。

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