Abstract:
Novel design of an LDPC decoder suitable for a range of code-block sizes and bit-rates, also suitable for both ASIC and FPGA implementations, is provided, in which the overhead associated with correction data sent along the transmission channel can be minimized. An LDPC decoder can be optimized for either eIRA based or general H matrices. An H parity matrix can be constructed and/or manipulated to arrange the bit-node message “columns” to facilitate mapping to MPB “columns” and corresponding access via LUT pointer tables to minimize processing cycles so as to: (i) minimize address conflicts within the same MPB that will take multiple access cycles to resolve; (ii) minimize splitting of bit-node messages across MPB “columns” that will take multiple access cycles to resolve; and (iii) balance the bit-node computations across all the MPB/LUT “columns” so that they will complete their computations at nearly the same time.
Abstract:
Systems and methods for enabling pre-compensation of timing offsets in OFDM receivers without invalidating channel estimates are described. Timing offset estimations may be sent along with the received OFDM symbols for FFT computation and generating a de-rotated signal output. The timing offset estimation may provide a reference point for dynamic tracking of timing for an OFDM signal and estimated based on an integral value associated with the OFDM signal.
Abstract:
Systems and methods for a non-data-aided (NDA) approach to advanced OFDM timing are provided. This approach allows for accurate OFDM symbol timing and synchronization by avoiding inter-symbol interference (ISI) in multipath environments where an earliest arriving signal may not be the strongest signal. The NDA approach may rely on generating and applying a bias correction to a combined correlation result of the multi-path signals.
Abstract:
Systems and methods for a non-data-aided (NDA) approach to advanced OFDM timing are provided. This approach allows for accurate OFDM symbol timing and synchronization by avoiding inter-symbol interference (ISI) in multipath environments where an earliest arriving signal may not be the strongest signal. The NDA approach may rely on generating and applying a bias correction to a combined correlation result of the multi-path signals.
Abstract:
Systems and methods are presented for transmitting additional data over preexisting differential COFDM signals by changing the amplitude of the legacy data symbols. In exemplary embodiments of the present invention, additional data capacity can be achieved for a COFDM signal which is completely backwards compatible with existing legacy satellite broadcast communications systems. In exemplary embodiments of the present invention, additional information can be overlaid on a legacy COFDM signal by applying an amplitude offset to the legacy symbols. In exemplary embodiments of the present invention, special receiver processing can be implemented to extract this additional information, which can include performing channel equalization across frequency bins to isolate the amplitude modulated overlay signal. For example, at each FFT symbol time, average power across neighboring active data bins can be used to determine the localized power at the corresponding FFT bins, and a channel inversion can then, for example, be performed on the data bins to restore, as best as possible, the original transmitted symbol amplitude.
Abstract:
Novel design of an LDPC decoder suitable for a range of code-block sizes and bit-rates, also suitable for both ASIC and FPGA implementations, is provided, in which the overhead associated with correction data sent along the transmission channel can be minimized. An LDPC decoder can be optimized for either eIRA based or general H matrices. An H parity matrix can be constructed and/or manipulated to arrange the bit-node message “columns” to facilitate mapping to MPB “columns” and corresponding access via LUT pointer tables to minimize processing cycles so as to: (i) minimize address conflicts within the same MPB that will take multiple access cycles to resolve; (ii) minimize splitting of bit-node messages across MPB “columns” that will take multiple access cycles to resolve; and (iii) balance the bit-node computations across all the MPB/LUT “columns” so that they will complete their computations at nearly the same time.
Abstract:
Systems and methods are presented to improve the performance of a constant bit rate iterative decoder by providing elastic buffering, while utilizing a relatively simple decoder architecture capable of maintaining a fixed number of iterations of a lower value. An LDPC decoder can be designed, for example, to support less than the maximum possible number of iterations, and can, for example, be mated to elastic input and output buffers. If a given code block, or succession of code blocks, requires the maximum number of iterations for decoding, the decoder can, for example, run at such maximum number of iterations and the elastic input buffer can, for example, hold code blocks waiting to be processed so as to maintain a constant input rate. Alternatively, if one or more code blocks requires less than the nominal number of iterations, the output buffer can store those code blocks so as to preserve a constant output rate. It is emphasized that this abstract is provided to comply with the rules requiring an abstract, and is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.
Abstract:
Systems and methods are presented for transmitting additional data over preexisting differential COFDM signals by modulating existing data carriers with a phase and an amplitude offset. In exemplary embodiments of the present invention, additional data capacity can be achieved for an COFDM signal which is completely backwards compatible with existing satellite broadcast communications systems. In exemplary embodiments of the present invention additional information can be overlayed on an existing signal as a combination of amplitude and phase offset from the original QPSK symbols, applied for each information bit of the overlay data. With two additional levels of modulation, a receiver can demodulate the information from each of the previous stages and combine the information into a suitable format for soft decoding. The first stage of demodulation will be recovery of overlay data from the amplitude modulated D8PSK. Because other amplitude variations due to multi-path are also expected, the data gathered from the FFT in the receiver must be equalized to the channel conditions. After channel equalization has been performed, soft overlay data can then be derived from the distance off the unit circle. In order to recover the phase modulated overlay data, the equalized symbols must first be differentially demodulated and corrected for any common phase error offset. After common phase removal, overlay phase information can be obtained.
Abstract:
Methods and apparatus are presented to allow one receiver architecture to be used for the reception of two different SDARS signals. Common receiver functions can be utilized to process each signal, thereby obviating the need to duplicate hardware elements. For example, it can be assumed that both signals will not be received at the same time, thus allowing for considerable hardware reuse and lowering the cost of an interoperable receiver.
Abstract:
Systems, methods and apparatus are described to interleave LDPC coded data for reception over a mobile communications channel, such as, for example, a satellite channel. In exemplary embodiments of the present invention, a method for channel interleaving includes segmenting a large LDPC code block into smaller codewords, randomly shuffling the code segments of each codeword and then convolutionally interleaving the randomly shuffled code words. In exemplary embodiments of the present invention, such random shuffling can guarantee that no two consecutive input code segments will be closer than a defined minimum number of code segments at the output of the shuffler. In exemplary embodiments of the present invention, by keeping data in, for example, manageable sub-sections, accurate SNR estimations, which are needed for the best possible LDPC decoding performance, can be facilitated based on, for example, iterative bit decisions.