Offset calibration circuit and method for an amplifier circuit

    公开(公告)号:US09893688B1

    公开(公告)日:2018-02-13

    申请号:US15299527

    申请日:2016-10-21

    Inventor: Pavan Nallamothu

    Abstract: A differential amplifier has an inherent offset voltage. In many circuit applications, such as with a voltage to current converter circuit, it is important to nullify that offset voltage. A calibration circuit is provided to configured the differential amplifier to operate as a comparator with a common voltage applied to both inputs. The logic state of the output of the amplifier indicates whether the offset voltage is positive or negative. In response thereto, a trim current with a progressively increasing magnitude is injected into the amplifier and the amplifier output is monitored to detect a change in logic state. The magnitude of the trim current at the point where the logic state changes is the magnitude of trim current needed to nullify the voltage offset.

    HIGH VOLTAGE COMPARATOR
    18.
    发明申请

    公开(公告)号:US20180367131A1

    公开(公告)日:2018-12-20

    申请号:US15625261

    申请日:2017-06-16

    Inventor: Pavan Nallamothu

    Abstract: An electronic device includes a power switch having a control terminal coupled to a first node, a first conduction terminal coupled to a second node, and a second conduction terminal coupled to a third node. A monitoring circuit has a first input coupled to the first node and a second input coupled to the second node, the monitoring circuit to generate a monitor signal indicating gate oxide stress on the power switch as a function of first and second voltages received at the first and second inputs thereof. A protection circuit actuates to protect the power switch from the gate oxide stress when the monitor signal indicates the gate oxide stress on the power switch. The monitoring signal is generated based upon a comparison of currents generated based upon the voltages at the first and second node, as well as a current generated based upon a programmable reference voltage.

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