公开(公告)号：US10566978B2

公开(公告)日：2020-02-18

申请号：US16105424

申请日：2018-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Francesco Pappalardo ,  Giuseppe Notarangelo

IPC: H03K19/21 ,  H03K19/173 ,  H04L29/12

Abstract: A system includes a processing circuit and a circuit configured to output a given number N of bits of configuration information to be used by the processing circuit. The circuit includes a non-volatile programmable memory configured to output a first group of N bits, N terminals for receiving a second group of N bits, and N logic gates. A first input terminal of each logic gate is connected to a respective bit of output from the non-volatile programmable memory and wherein a second input terminal of each logic gate is connected to a respective terminal of the N terminals.