公开(公告)号：US20230135498A1

公开(公告)日：2023-05-04

申请号：US18050413

申请日：2022-10-27

Applicant: STMICROELECTRONICS S.r.l. ,  SHENZHEN STS MICROELECTRONICS CO., LTD.

Inventor： Yi Ming LIANG ,  Roberto TIZIANI ,  Qian LIU ,  Feng DING

IPC: H01L23/367 ,  H01L23/13 ,  H01L23/00 ,  H01L23/373

Abstract: Embodiments of the present disclosure relate to a semiconductor package, a method of forming the package and an electronic device. For example, the semiconductor package may comprise a first substrate assembly comprising a first surface and a second surface opposite the first surface. The semiconductor package may also comprise one or more chips connected or coupled to the first surface of the first substrate assembly by a first thermally and electrically conductive connecting material. In addition, the semiconductor package further comprises a second substrate assembly comprising a third surface and a fourth surface opposite the third surface, the third surface and the first surface being arranged to face each other, and the third surface being connected to one or more chips by a second thermally and electrically conductive connecting material. At least one of the first surface and the third surface is shaped to have a stepped pattern to match a surface of the one or more chips. Embodiments of the present disclosure may at least simplify the double-sided heat dissipation structure and improve the heat dissipation effect of the chip.

公开(公告)号：US20230031356A1

公开(公告)日：2023-02-02

申请号：US17873967

申请日：2022-07-26

Applicant: STMicroelectronics S.r.l.

Inventor： Mauro MAZZOLA ,  Roberto TIZIANI

IPC: H01L21/48 ,  H01L23/495

Abstract: A pre-molded leadframe includes a laminar structure having empty spaces therein and a first thickness with a die pad having opposed first and second die pad surfaces. Insulating pre-mold material is molded onto the laminar structure. The pre-mold material penetrates the empty spaces and provides a laminar pre-molded substrate having the first thickness with the first die pad surface left exposed. The die pad has a second thickness that is less than the first thickness. One or more pillar formations are provided protruding from the second die pad surface to a height equal to a difference between the first and second thicknesses. With the laminar structure clamped between surfaces of a mold, the first die pad surface and pillar formations abut against the mold surfaces. The die pad is thus effectively clamped between the clamping surfaces countering undesired flashing of the pre-mold material over the first die pad surface.

公开(公告)号：US20220384209A1

公开(公告)日：2022-12-01

申请号：US17824703

申请日：2022-05-25

Applicant: STMicroelectronics S.r.l.

Inventor： Roberto TIZIANI ,  Antonio BELLIZZI

IPC: H01L21/48 ,  H01L23/495 ,  H01L21/56

Abstract: Semiconductor chips are arranged on an elongated substrate and encapsulated by an insulating encapsulation. Electrically conductive formations and electrically conductive plating lines are plated on the insulating encapsulation using, for example, Laser Direct Structuring (LDS) or Direct Copper Interconnect (DCI) material. The electrically conductive plating lines include first transverse plating lines as well as second plating lines branching out from the first plating lines towards the electrically conductive formations. A first partial cutting step is then performed to form grooves which remove the first plating lines. An insulating material is dispensed in the grooves to encapsulate the end portions of the second plating lines. A second cutting step median along the groove and through the elongate substrate is performed to produce singulated semiconductor devices (such as “die pad up” Quad-Flat No-lead (QFN) packages). End portions of the second plating lines are encapsulated by the insulating material.

公开(公告)号：US20210183752A1

公开(公告)日：2021-06-17

申请号：US17120996

申请日：2020-12-14

Applicant: STMicroelectronics S.r.l.

Inventor： Michele DERAI ,  Roberto TIZIANI

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device comprises at least one semiconductor die electrically coupled to a set of electrically conductive leads, and package molding material molded over the at least one semiconductor die and the electrically conductive leads. At least a portion of the electrically conductive leads is exposed at a rear surface of the package molding material to provide electrically conductive pads. The electrically conductive pads comprise enlarged end portions extending at least partially over the package molding material and configured for coupling to a printed circuit board.