公开(公告)号：US20190334002A1

公开(公告)日：2019-10-31

申请号：US16273029

申请日：2019-02-11

Applicant: Samsung Display Co., Ltd.

Inventor： Ilhun SEO ,  Yun-Mo CHUNG ,  Daewoo LEE ,  Tak-Young LEE ,  Miyeon CHO

IPC: H01L29/417 ,  H01L27/32

Abstract: A thin film transistor substrate may include a base substrate, a semiconductor member, a gate electrode, a first insulation layer, and a source/drain electrode. The semiconductor member may overlap the base substrate. The gate electrode may overlap the semiconductor member and may be insulated from the semiconductor member. The first insulation layer may be positioned on the gate electrode and may include a first contact hole. The source/drain electrode may include a first discharge hole, may be electrically connected to the semiconductor member, and may be at least partially positioned inside the first contact hole. The first discharge hole may partially expose the semiconductor member.

公开(公告)号：US20190221616A1

公开(公告)日：2019-07-18

申请号：US16251262

申请日：2019-01-18

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yunmo CHUNG ,  Takyoung LEE ,  Ilhun SEO ,  Hojin YOON ,  Daewoo LEE

IPC: H01L27/32 ,  H01L51/50 ,  H01L51/52 ,  H01L51/56

CPC classification number: H01L27/3223 ,  H01L27/3262 ,  H01L27/3276 ,  H01L51/5012 ,  H01L51/5206 ,  H01L51/5221 ,  H01L51/56 ,  H01L2227/323

Abstract: A display apparatus and a method of manufacturing a display apparatus, the display apparatus including a first area, the first area including a structure of thin layers on a substrate; a second area, the second area including a structure of thin layers on the substrate; a planarization layer that planarizes the first area and the second area; and a step-height compensation layer, wherein the structure of thin layers of the first area is different from the structure of thin layers of the second area, the step-height compensation layer compensates for a height difference between the first area and the second area due to the different structures of thin layers, and the step-height compensation layer is between the substrate and the planarization layer and in the first area or the second area.

公开(公告)号：US20170256747A1

公开(公告)日：2017-09-07

申请号：US15440868

申请日：2017-02-23

Applicant: Samsung Display Co., Ltd

Inventor： Daewoo LEE ,  Shinmoon KANG ,  Byung Ik KONG ,  Byoungki KIM ,  Hyunchul SON ,  Yun-Mo CHUNG

IPC: H01L51/52 ,  H01L27/32 ,  H04N5/225 ,  H01L51/50

Abstract: An organic light emitting display apparatus includes first to eighth pixels arranged in a 4*2 matrix form along first and second directions, and includes a camera which is configured to take a picture. Each of the first to eighth pixels has a width in the first direction and has a length in the second direction. Each of the first to eighth pixels has a light emitting structure and a first mirror pattern which defines an opening which overlaps the light emitting structure. The first mirror pattern defines one transmission window in every two or more pixels adjacent each other, the transmission window passes light, and the camera is configured to take a picture through the transmission window.

公开(公告)号：US20180366530A1

公开(公告)日：2018-12-20

申请号：US15960111

申请日：2018-04-23

Applicant: Samsung Display Co., Ltd.

Inventor： Ilhun SEO ,  Yun-Mo CHUNG ,  Jae-Wook KANG ,  Hojin YOON ,  Daewoo LEE ,  Minseong YI ,  Tak-Young LEE ,  Miyeon CHO

IPC: H01L27/32

Abstract: A unit pixel includes a circuit structure, first and second wiring patterns, an interlayer insulating layer, a planarization layer, and a light emission structure. The first wiring pattern disposed on the circuit structure has a first bump structure. The interlayer insulating layer covers the circuit structure and the first wiring pattern. The second wiring pattern disposed on the interlayer insulating layer overlaps the first wiring pattern and has a second bump structure. The planarization layer covers the interlayer insulating layer and the second wiring pattern and includes a via-hole exposing at least a portion of be second wiring pattern. The light emission structure contacts the second wiring pattern through the via-hole. The first and second wiring patterns and the interlayer insulating layer form a capacitor, the light emission structure includes an OLED, and the capacitor is directly connected to an anode of the OLED.

公开(公告)号：US20180074361A1

公开(公告)日：2018-03-15

申请号：US15682472

申请日：2017-08-21

Applicant: Samsung Display Co., Ltd.

Inventor： Yun-mo CHUNG ,  Ilhun SEO ,  Hojin YOON ,  Daewoo LEE ,  Minseong Yi ,  Miyeon CHO

IPC: G02F1/1333 ,  H05K5/02 ,  F21V33/00

CPC classification number: G02F1/133308 ,  F21V33/0052 ,  G02F1/133305 ,  G02F1/13336 ,  G02F1/13452 ,  G02F2001/13332 ,  H05K5/02

Abstract: A display device includes a display panel and at least one electronic component connected to the display panel. The display panel includes a display area and a non-display area disposed around the display area on a plane. The non-display area has a first bending line and a second bending line intersecting the first bending line. The display panel includes a circuit layer and a display element layer including display elements. The circuit layer is disposed in the display area, disposed on a different layer than pixel circuits, and electrically connects the at least electronic component and the driving circuit.

公开(公告)号：US20180068919A1

公开(公告)日：2018-03-08

申请号：US15608550

申请日：2017-05-30

Applicant: Samsung Display Co., Ltd.

Inventor： Yunmo CHUNG ,  Ilhun SEO ,  Hojin YOON ,  Daewoo LEE ,  Minseong YI ,  Miyeon CHO

IPC: H01L23/31 ,  H01L23/538 ,  G09G3/36 ,  H01L23/482 ,  H01L27/02

CPC classification number: H01L23/31 ,  G09G3/3685 ,  H01L23/4824 ,  H01L23/5387 ,  H01L27/0248 ,  H01L27/3276 ,  H01L51/5253

Abstract: Provided is a display apparatus capable of minimizing defect occurrences during manufacturing of the display apparatus while securing a long lifespan of the display apparatus. The display apparatus includes a substrate comprising a bent area between a first area and a second area and bent about a bending axis, display devices on the first area, a scan driving circuit unit on the second area, a first encapsulation layer configured to cover the display devices, and a second encapsulation layer apart from the first encapsulation layer and configured to cover the scan driving circuit unit.