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公开(公告)号:US11302771B2
公开(公告)日:2022-04-12
申请号:US16886876
申请日:2020-05-29
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Sunghwan Won , Jongmoo Huh , Kyumin Kim , Doohyun Kim , Songhee Kim , Jeehoon Kim , Shinhyuk Yang
Abstract: A display device includes a substrate including a display area and a peripheral area outside the display area, a thin-film transistor arranged in the display area, a display element arranged in the display area, an interlayer insulating layer covering the thin-film transistor, a conductive layer arranged above the interlayer insulating layer, a first insulating layer covering the conductive layer, a pad arranged in the peripheral area, and a second conductive layer covering a central portion of the pad. The pad is connected to a connection line through a contact hole, and the connection line is arranged on a same first layer as a gate electrode of the thin-film transistor. A side surface of the pad is covered by the first insulating layer or the second conductive layer.
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公开(公告)号:US09291870B2
公开(公告)日:2016-03-22
申请号:US14462863
申请日:2014-08-19
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Young Jun Shin , Jeehoon Kim , Sehun Park , Jaehwan Oh , Guanghai Kim , Byoungki Kim , Wonkyu Lee
IPC: H01L27/32 , H01L29/423 , H01L29/417 , H01L23/36 , G02F1/1362 , H01L23/367
CPC classification number: G02F1/136213 , G02F1/133385 , G02F1/1368 , G02F2001/13685 , H01L23/3677 , H01L27/0211 , H01L27/124 , H01L29/41733 , H01L29/42384 , H01L2924/0002 , H01L2924/00
Abstract: A thin film transistor includes a semiconductor pattern on a base substrate, the semiconductor pattern including an input area, an output area, and a channel area between the input area and the output area, a first insulating layer covering the semiconductor pattern, a control electrode on the first insulating layer, the control electrode overlapping the channel area, a second insulating layer covering the control electrode, an input electrode connected to the input area, an output electrode connected to the output area, and a heat discharge electrode on the second insulating layer, the heat discharge electrode being connected to the control electrode.
Abstract translation: 薄膜晶体管包括在基底基板上的半导体图案,所述半导体图案包括输入区域,输出区域和输入区域与输出区域之间的沟道区域,覆盖半导体图案的第一绝缘层,控制电极 在所述第一绝缘层上,所述控制电极与所述沟道区域重叠,覆盖所述控制电极的第二绝缘层,连接到所述输入区域的输入电极,连接到所述输出区域的输出电极,以及所述第二绝缘层上的放热电极 所述放热电极与所述控制电极连接。
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公开(公告)号:US20230295501A1
公开(公告)日:2023-09-21
申请号:US18169798
申请日:2023-02-15
Applicant: Samsung Display Co., Ltd. , DONGWOO FINE-CHEM Co., Ltd.
Inventor: Shinhyuk Yang , Beomsoo Kim , Hyeonsu Cho , Yujin Kim , Jeehoon Kim , Youngjin Yoon , Eunwon Lee , Donghan Kang
IPC: C09K13/06
CPC classification number: C09K13/06
Abstract: An etchant including: persulfate; a fluorine-containing compound; a chlorine-containing compound; a cyclic amine compound; an inorganic acid; sulfate; and water, wherein a tip control index (Y) of the etchant is a value of at least about 45.0 and not more than about 70.0, the tip control index (Y) being a value calculated by Equation 1:
Y=1.0×10−3×M(X1)+1.0×10−1×M(X2)+5.0×10−2×M(X3)+1.5×M(X1)×M(X2)+2.0×10−1×M(X1)×M(X3)+2.0×10−1×M(X2)×M(X3) Equation 1
The description of Equation 1 is as in the specification.-
公开(公告)号:US20230240095A1
公开(公告)日:2023-07-27
申请号:US18153968
申请日:2023-01-12
Applicant: Samsung Display Co., Ltd.
Inventor: Shinhyuk Yang , Jeehoon Kim , Donghan Kang , Junki Lee
IPC: H10K59/12 , H10K59/131
CPC classification number: H10K59/1201 , H10K59/131
Abstract: A display apparatus includes: a substrate including a display area, and a peripheral area outside the display area; a display element at the display area; and a pad at the peripheral area, the pad including: a first metal layer; a second metal layer on the first metal layer; a first metal oxide layer on the second metal layer, and in surface-contact with the second metal layer; and an oxide conductive layer on the first metal oxide layer, and in surface-contact with the first metal oxide layer.
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公开(公告)号:US20220181427A1
公开(公告)日:2022-06-09
申请号:US17447046
申请日:2021-09-07
Applicant: Samsung Display Co., Ltd.
Inventor: Shinhyuk Yang , Donghan Kang , Soonwook Hong , Yujin Kim , Jeehoon Kim , Hanhee Yoon
IPC: H01L27/32
Abstract: A display apparatus includes: a substrate including a display area, and a peripheral area; and a pad unit at the peripheral area, the pad unit including: a first conductive layer; a second conductive layer on the first conductive layer, and having a first opening; a third conductive layer on the second conductive layer, and having a second opening overlapping with the first opening, the second opening having an area less than an area of the first opening at a top surface of the second conductive layer; an organic protective layer filling the first opening, and having a third opening overlapping with the second opening; and an additional metal layer covering a top surface of the first conductive layer exposed through the first opening, an inner surface of the second opening, an inner surface of the third opening, and a portion of a top surface of the third conductive layer.
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公开(公告)号:US10396140B2
公开(公告)日:2019-08-27
申请号:US15427111
申请日:2017-02-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Jeehoon Kim , Shinhyuk Yang , Doohyun Kim , Kwangsoo Lee , Inyoung Jung
IPC: H01L27/32 , H01L29/786 , H01L51/52 , H01L29/417 , H01L29/423 , H01L29/66
Abstract: A thin film transistor includes a substrate and a gate electrode disposed over the substrate. The gate electrode includes a center part and a peripheral part configured to at least partially surround the center part. The thin film transistor further includes a gate insulating layer disposed below the gate electrode and a first electrode insulated from the gate electrode by the gate insulating layer. The first electrode has at least a portion thereof overlapping the center part. The thin film transistor additionally includes a spacer disposed below the first electrode and a second electrode insulated from the first electrode by the spacer. The second electrode has at least a portion thereof overlapping the peripheral part. The thin film transistor further includes a semiconductor layer connected to the first and second electrodes, and insulated from the gate electrode by the gate insulating layer.
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