公开(公告)号：US20220397974A1

公开(公告)日：2022-12-15

申请号：US17821455

申请日：2022-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Do Ik KIM ,  Gwang Bum KO ,  Sung Hwan KIM

IPC: G06F3/041 ,  H01L27/32 ,  H01L41/113 ,  H01L51/52 ,  G06F3/043

Abstract: A display device that senses externally applied pressure and a change in the resonant frequency of a piezoelectric element. The display device includes a piezoelectric sensor layer including a piezoelectric sensor; and a display panel disposed on the piezoelectric sensor layer. The piezoelectric sensor includes: a piezoelectric element having a first electrode, a second electrode facing the first electrode, and a piezoelectric material disposed between the first electrode and the second electrode; an alternating current (AC) voltage generator connected to the first electrode and applies a voltage having a resonance frequency to the piezoelectric element. A sensing circuit connected to the second electrode is configured to measure a change in impedance of the piezoelectric element.

公开(公告)号：US20210295768A1

公开(公告)日：2021-09-23

申请号：US17339808

申请日：2021-06-04

Applicant: Samsung Display Co., Ltd.

Inventor： Chul Kyu KANG ,  Sung Hwan KIM ,  Soo Hee OH ,  Dong Sun LEE ,  Sang Moo CHOI

IPC: G09G3/32

Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.

公开(公告)号：US20200211467A1

公开(公告)日：2020-07-02

申请号：US16708344

申请日：2019-12-09

Applicant: Samsung Display Co., Ltd.

Inventor： Chul Kyu KANG ,  Sung Hwan KIM ,  Soo Hee OH ,  Dong Sun LEE ,  Sang Moo CHOI

IPC: G09G3/3266 ,  G09G3/3291 ,  G09G3/3233

Abstract: A stage of a scan driver for a display device, the stage includes: an output unit to output to an output terminal either a signal supplied to a first clock terminal corresponding to voltage of a first driving node or a voltage of a second power source corresponding to voltage of a second driving node; an input unit to control the voltage of the first driving node corresponding to signals supplied to a first input terminal, and the input unit to control the voltage of the second driving node corresponding to signals supplied to a second input terminal and a second clock terminal; a first signal processor including a second capacitor coupled between the second driving node and a second node, the first signal processor to control the voltage of the second driving node corresponding to signals supplied to a third clock terminal and a fourth clock terminal, the first signal processor to control a potential difference between both ends of the second capacitor corresponding to the signal supplied to the fourth clock terminal; and a second signal processor to control the voltage of the first driving node corresponding to the signal supplied to the first clock terminal.

公开(公告)号：US20200175913A1

公开(公告)日：2020-06-04

申请号：US16697690

申请日：2019-11-27

Applicant: Samsung Display Co., Ltd.

Inventor： Chul Kyu KANG ,  Sung Hwan KIM ,  Soo Hee OH ,  Dong Sun LEE ,  Sang Moo CHOI

IPC: G09G3/32

Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.

公开(公告)号：US20200066212A1

公开(公告)日：2020-02-27

申请号：US16505708

申请日：2019-07-09

Applicant: Samsung Display Co., Ltd.

Inventor： Sung Hwan KIM ,  Sang Moo CHOI ,  Dae Hyun KIM ,  Soo Hee OH ,  Dong Sun LEE

IPC: G09G3/3266

Abstract: A pixel circuit includes: an organic light emitting diode (OLED); a first transistor having first and second electrodes and a first gate electrode; a second transistor connected between a data line and the first electrode, controlled by a first scan line; a third transistor connected between the second electrode and the a electrode of the first transistor, controlled by the first scan line; a fourth transistor connected between the first gate electrode and a first initialization voltage line, controlled by a second scan line; a fifth transistor connected between a power line and first electrode, controlled by a first emission line; a sixth transistor connected between the second electrode and the OLED and controlled by a second emission line; and a storage capacitor connected between the first gate electrode and the power line, wherein the first emission line and the second emission line are located at different nodes.

公开(公告)号：US20180005573A1

公开(公告)日：2018-01-04

申请号：US15626305

申请日：2017-06-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung Hwan KIM ,  Jun Hyun PARK ,  Kyoung Ju SHIN

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A stage includes first, second, and third outputs and first and second signal processors. The first output supplies a scan signal to a first output terminal based on signals to first and second input terminals and the voltage of a first node. The second output is connected to a first power source and supplies an emission control signal to a second output terminal based on signals to the first input terminal, the first output terminal, and a third input terminal. The third output is connected to the first power source and supplies an inverted emission control signal to a third output terminal based on signals to the first input terminal and second output terminal. The first signal processor controls the first node voltage based on a signal to a fourth input terminal. The second signal processor controls the first node voltage based on the signal to the second input terminal.

公开(公告)号：US20170271382A1

公开(公告)日：2017-09-21

申请号：US15617205

申请日：2017-06-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Se Hyoung CHO ,  Il Gon KIM ,  Sung Hwan KIM ,  Mee Hye JUNG

IPC: H01L27/12 ,  H01L29/417 ,  H01L29/423 ,  G09G3/36

CPC classification number: H01L27/1288 ,  G09G3/3648 ,  G09G2300/0426 ,  G09G2320/0285 ,  G09G2360/16 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/42384

Abstract: A liquid crystal display includes a first pixel and a second pixel that extend in a data line direction. The first and second pixels are connected to a same data line, and the first pixel is closer to a data driver than the second pixel. A channel width of a thin film transistor of the first pixel is less than a channel width of a thin film transistor of the second pixel.

公开(公告)号：US20170061914A1

公开(公告)日：2017-03-02

申请号：US15092466

申请日：2016-04-06

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun PARK ,  Keum Nam KIM ,  Sung Hwan KIM ,  Kyoung Ju SHIN

IPC: G09G3/36

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286

Abstract: In a scan driver including a plurality of stages configured to supply scan signals to scan lines, the scan driver includes: an i−1th stage configured to supply an i−1th scan signal to an i−1th scan line while controlling a node Qi−1 (i is a natural number) in response to a first clock signal, a third clock signal, and a control voltage; an ith stage configured to supply an ith scan signal to an ith scan line while controlling a node Qi in response to a second clock signal, a fourth clock signal, and the control voltage; and a controller connected to the i−1th stage and the ith stage, and configured to supply the control voltage.

Abstract translation: 在包括被配置为向扫描线提供扫描信号的多个级的扫描驱动器中，扫描驱动器包括：第i级，被配置为将第i-1扫描信号提供给第i-1条扫描线，同时控制节点Qi- 1（i是自然数），响应于第一时钟信号，第三时钟信号和控制电压; 第i级，被配置为响应于第二时钟信号，第四时钟信号和控制电压控制节点Qi，将第i扫描信号提供给第i扫描线; 以及连接到第i级和第i级的控制器，并且被配置为提供控制电压。

公开(公告)号：US20160307537A1

公开(公告)日：2016-10-20

申请号：US15042029

申请日：2016-02-11

Applicant: Samsung Display Co., Ltd

Inventor： Jun Hyun PARK ,  Sung Hwan KIM ,  Se Young SONG ,  Kyoung Ju SHIN ,  Jae Keun LIM

IPC: G09G3/36 ,  H03K17/687

CPC classification number: G09G3/3677 ,  G09G3/20 ,  G09G2300/0465 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G11C19/28 ,  H03K17/6871

Abstract: There is provided a stage circuit capable of minimizing a mounting area. The stage circuit includes: an output unit configured to supply a voltage of a first node, an i-th (i is a natural number) carry signal, and to supply an i-th scan signal in response to the voltage of the first node, a voltage of a second node, and a first clock signal, a controller configured to control the voltage of the second node in response to the first clock signal; a pull-up unit configured to control the voltage of the first node in response to a carry signal of a previous stage and a voltage of a first node of the previous stage, and a pull-down unit configured to control the voltage of the first node in response to the voltage of the second node and a carry signal of a next stage.

Abstract translation: 提供能够最小化安装面积的平台电路。 舞台电路包括：输出单元，被配置为提供第一节点的电压，第i（i是自然数）进位信号，并且响应于第一节点的电压提供第i个扫描信号 ，第二节点的电压和第一时钟信号，被配置为响应于第一时钟信号来控制第二节点的电压的控制器; 上拉单元，被配置为响应于前一级的进位信号和前一级的第一节点的电压来控制第一节点的电压;以及下拉单元，被配置为控制第一节点的电压 响应于第二节点的电压和下一级的进位信号。

公开(公告)号：US20160005357A1

公开(公告)日：2016-01-07

申请号：US14547521

申请日：2014-11-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Se Hyoung CHO ,  Joon-Chul GOH ,  Jang Mi KANG ,  Sung Hwan KIM ,  Il Gon KIM ,  Sang Hyeon SONG ,  Mee Hye JUNG

IPC: G09G3/32

CPC classification number: G09G3/3233 ,  G09G3/3677 ,  G09G2300/0819 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2320/0252

Abstract: A display panel includes a gate line extending in a column direction, a data line extending in a row direction, a pixel including a switching transistor connected to the gate line and the data line, and a voltage applier connected to a gate line of a present stage. The voltage applier to apply a voltage after conversion of the gate-on voltage to a gate-off voltage has started. The voltage is closer to the gate-on voltage than the gate-off voltage.

Abstract translation: 显示面板包括沿列方向延伸的栅极线，沿行方向延伸的数据线，包括连接到栅极线和数据线的开关晶体管的像素，以及连接到当前栅极线的电压施加器 阶段。 开始了将栅极导通电压转换为栅极截止电压之后施加电压的施加电压器。 电压比栅极截止电压更接近栅极导通电压。