公开(公告)号：US11501715B2

公开(公告)日：2022-11-15

申请号：US16908903

申请日：2020-06-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kang Moon Jo ,  Chong Chul Chai ,  Young Wan Seo ,  Cheol-Gon Lee

IPC: G09G3/3266 ,  G09G3/20 ,  G09G3/3258

Abstract: A display device includes a substrate that includes a display area for displaying an image and a non-display area surrounding the display area, a plurality of pixels that are disposed in the display area and each include an organic light emitting diode and a pixel circuit portion configured to operate the organic light emitting diode, and a scan driver that is disposed in the non-display area and includes a plurality of stages configured to output scan signals to the plurality of pixels. The plurality of stages may be arranged in n columns, a height of one stage may correspond to a height of n pixels, and n may be an integer of 2 or more.

公开(公告)号：US11322093B2

公开(公告)日：2022-05-03

申请号：US17062971

申请日：2020-10-05

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Chong Chui Chai ,  Young Wan Seo ,  An Su Lee ,  Bo Yong Chung ,  Kang Moon Jo

IPC: G09G3/3258 ,  G09G3/3233

Abstract: A pixel circuit includes a first switching element including a control electrode connected to a first node, an input electrode which receives a first power voltage and an output electrode connected to a third node, a second switching element including a control electrode which receives a compensation gate signal, an input electrode connected to a second node and an output electrode connected to the third node, a third switching element including a control electrode which receives a write gate signal, an input electrode connected to the first node and an output electrode connected to the second node, a storage capacitor including a first electrode which receives an initialization voltage and a second electrode connected to the first node, a program capacitor which receives a data voltage and connected to the second node, and an organic light emitting element connected to the third node and which receives a second power voltage.

公开(公告)号：US11081056B2

公开(公告)日：2021-08-03

申请号：US15989673

申请日：2018-05-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Young Wan Seo ,  An Su Lee ,  Kang Moon Jo ,  Chong Chul Chai

IPC: G09G3/3266 ,  G09G3/3225 ,  G09G3/3233

Abstract: An organic light emitting display device includes a plurality of pixels. A pixel on an ith horizontal line includes a first transistor coupled between a first power source and a first node and having a gate electrode coupled to a second node. An organic light emitting diode is coupled between the first node and a second power source. A second transistor is coupled between the second and third nodes and is turned on when a first scan signal is supplied to an ith first scan line. A third transistor is coupled between the third and first nodes. A first capacitor is coupled between an ith control line and the second node. A second capacitor is coupled between the third node and a data line. The pixels are simultaneously driven during first, second, and third periods of a frame period and sequentially driven during a fourth period of the frame period.

公开(公告)号：US20210056909A1

公开(公告)日：2021-02-25

申请号：US16908903

申请日：2020-06-23

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KANG MOON JO ,  Chong Chul Chai ,  Young Wan Seo ,  Cheol-Gon Lee

IPC: G09G3/3266 ,  G09G3/20 ,  G09G3/3258

Abstract: A display device includes a substrate that includes a display area for displaying an image and a non-display area surrounding the display area, a plurality of pixels that are disposed in the display area and each include an organic light emitting diode and a pixel circuit portion configured to operate the organic light emitting diode, and a scan driver that is disposed in the non-display area and includes a plurality of stages configured to output scan signals to the plurality of pixels. The plurality of stages may be arranged in n columns, a height of one stage may correspond to a height of n pixels, and n may be an integer of 2 or more.

公开(公告)号：US20160379566A1

公开(公告)日：2016-12-29

申请号：US15157350

申请日：2016-05-17

Applicant: Samsung Display Co., Ltd.

Inventor： Jae Keun Lim ,  Jong Hee Kim ,  Ji-Sun Kim ,  Young Wan Seo ,  Chong Chul Chai

IPC: G09G3/3258 ,  G09G3/3275

CPC classification number: G09G3/3283 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/08 ,  G09G2320/0209

Abstract: There is provided a display device including a display including a first pixel connected to a first data line and a second pixel connected to a second data line, a data signal generator configured to generate an output signal, and a signal divider configured to divide the output signal, to generate a first data signal and a second data signal, and to apply the first data signal and the second data signal to the first data line and the second data line, respectively, wherein the data signal generator is configured to generate the output signal based on a coupling effect of a first parasitic capacitor formed between the first data line and the second data line and a coupling effect of a parasitic capacitor of a data line formed by the first data line and second data line.

Abstract translation: 提供了一种显示装置，包括：显示器，包括连接到第一数据线的第一像素和连接到第二数据线的第二像素;数据信号发生器，被配置为产生输出信号;以及信号分配器， 信号，以产生第一数据信号和第二数据信号，并且分别将第一数据信号和第二数据信号施加到第一数据线和第二数据线，其中数据信号发生器被配置为产生输出 基于形成在第一数据线和第二数据线之间的第一寄生电容的耦合效应以及由第一数据线和第二数据线形成的数据线的寄生电容的耦合效应的信号。

公开(公告)号：US20160293269A1

公开(公告)日：2016-10-06

申请号：US14970350

申请日：2015-12-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jae Keun Lim ,  Jong Hee Kim ,  Ji Sun Kim ,  Young Wan Seo ,  Chong Chul Chai

IPC: G11C19/28 ,  G09G5/00

CPC classification number: G11C19/28 ,  G09G3/20 ,  G09G3/3266 ,  G09G3/3674 ,  G09G2300/0871 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/08 ,  G11C19/184

Abstract: There is provided a shift register including a plurality of stages sequentially coupled to an input terminal configured to receive a start pulse, wherein each of the plurality of stages includes a first transistor coupled between a first clock input terminal and an output terminal and having a first gate electrode coupled to a first node, a second transistor coupled between the output terminal and a power input terminal and having a second gate electrode coupled to a second clock input terminal, and a third transistor coupled between the first node and a first input terminal configured to receive the start pulse or an output signal of a previous stage of the stages, the third transistor having a third gate electrode coupled to the second clock input terminal.

Abstract translation: 提供了一种移位寄存器，其包括顺序地耦合到被配置为接收起始脉冲的输入端子的多个级，其中多个级中的每一级包括耦合在第一时钟输入端子和输出端子之间的第一晶体管，并且具有第一 耦合到第一节点的第二晶体管，连接在输出端子和电源输入端子之间并具有耦合到第二时钟输入端子的第二栅极电极的第二晶体管，以及耦合在第一节点和配置的第一输入端子之间的第三晶体管 为了接收所述级的前一级的起始脉冲或输出信号，所述第三晶体管具有耦合到所述第二时钟输入端的第三栅极。

公开(公告)号：US20160293093A1

公开(公告)日：2016-10-06

申请号：US14952590

申请日：2015-11-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young Wan Seo ,  Jong Hee Kim ,  Ji Sun Kim ,  Jae Keun Lim ,  Chong Chul Chai

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0264 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0297 ,  H02M3/073

Abstract: A demultiplexer includes: a first transistor connected between a data input terminal and a first output terminal; a second transistor connected between the data input terminal and a second output terminal; and a first pre-charge circuit connected to a gate electrode of the first transistor, the first pre-charge circuit including: a third transistor and a first diode connected between a first clock input terminal and the gate electrode of the first transistor in parallel; and a first capacitor connected between a second clock input terminal and the gate electrode of the first transistor.

Abstract translation: 解复用器包括：连接在数据输入端和第一输出端之间的第一晶体管; 连接在数据输入端和第二输出端之间的第二晶体管; 以及与所述第一晶体管的栅电极连接的第一预充电电路，所述第一预充电电路包括：并联连接在所述第一晶体管的第一时钟输入端和所述栅电极之间的第三晶体管和第一二极管; 以及连接在第二时钟输入端和第一晶体管的栅电极之间的第一电容器。

公开(公告)号：US12035592B2

公开(公告)日：2024-07-09

申请号：US17864532

申请日：2022-07-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kang Moon Jo ,  Young Wan Seo ,  Chong Chul Chai

IPC: H01L29/08 ,  H10K59/121 ,  H10K59/131 ,  G09G3/32

CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/1216 ,  G09G3/32 ,  G09G2300/0426 ,  G09G2320/0233

Abstract: A display device includes a first pixel including a first transistor, a second transistor, and a third transistor, a second pixel disposed adjacent to the first pixel in a first direction, and including a first transistor, a second transistor, and a third transistor, and an initialization voltage line disposed between the first pixel and the second pixel, and extending in a second direction crossing the first direction. The second transistor of the first pixel and the second transistor of the second pixel are connected to the initialization voltage line. The first, second, and third transistors of the first pixel and the first, second, and third transistors of the second pixel are symmetrical with respect to the initialization voltage line.

公开(公告)号：US12004384B2

公开(公告)日：2024-06-04

申请号：US18051951

申请日：2022-11-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Hyeong Seok Kim ,  Young Wan Seo ,  Yu Jin Lee ,  Cheol Gon Lee

IPC: H10K59/126 ,  G09G3/3233 ,  H01L27/12

CPC classification number: H10K59/126 ,  G09G3/3233 ,  H01L27/1248 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2320/0233

Abstract: A display device includes a display panel having a general area including first subpixels, and a sensor area including second subpixels and light-transmitting area. Each of the first subpixels and the second subpixels includes a first active layer disposed on a substrate and formed of a first material, a first gate layer disposed on the first active layer, a second gate layer disposed on the first gate layer, a second active layer disposed on the second gate layer and formed of a second material different from the first material, a third gate layer disposed on the second active layer, and a light-blocking layer disposed between the substrate and the first active layer and overlapping the second active layer in a thickness direction.

公开(公告)号：US11211003B2

公开(公告)日：2021-12-28

申请号：US16524744

申请日：2019-07-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Young Wan Seo ,  Min Kyu Woo ,  An Su Lee ,  Cheol Gon Lee

IPC: G09G3/30 ,  G09G3/3241 ,  G09G3/3291 ,  G09G3/36

Abstract: In a display device including pixels, each of the pixels may include: a first transistor coupled to a first node, a first power supply voltage line, and a second node; and a light-emitting diode coupled to the second node and a second power supply voltage line. Each image frame may include at least two emission enable periods for the light-emitting diode, and at least one emission inhibit period between the at least two emission enable periods.