公开(公告)号：US11508795B2

公开(公告)日：2022-11-22

申请号：US17139676

申请日：2020-12-31

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Hyeong Seok Kim ,  Young Wan Seo ,  Yu Jin Lee ,  Cheol Gon Lee

IPC: H01L27/32 ,  G09G3/3233 ,  H01L27/12

Abstract: A display device includes a display panel having a general area including first subpixels, and a sensor area including second subpixels and light-transmitting area. Each of the first subpixels and the second subpixels includes a first active layer disposed on a substrate and formed of a first material, a first gate layer disposed on the first active layer, a second gate layer disposed on the first gate layer, a second active layer disposed on the second gate layer and formed of a second material different from the first material, a third gate layer disposed on the second active layer, and a light-blocking layer disposed between the substrate and the first active layer and overlapping the second active layer in a thickness direction.

公开(公告)号：US20210082353A1

公开(公告)日：2021-03-18

申请号：US17093876

申请日：2020-11-10

Applicant: Samsung Display Co. Ltd.

Inventor： Jun Hyun Park ,  Sun Kwang Kim ,  Young Wan Seo ,  Cheol Gon Lee ,  Yang Hwa Choi

IPC: G09G3/3291 ,  G09G3/3258 ,  G09G3/3233 ,  G09G3/3266

Abstract: A display device includes a data line to which a data voltage is applied, a first driving voltage line to which a first driving voltage is applied, a second driving voltage line to which a second driving voltage is applied, and a pixel connected to the first and second driving voltage lines. The pixel includes a first transistor to control a driving current according to a voltage applied to a first node, a light emitting element between the first transistor and the first driving voltage line, and a capacitor between the first node and the second driving voltage line. The first driving voltage has a first high-level voltage during a first initialization period, the first driving voltage has a first mid-level voltage lower than the first high level voltage during a threshold-voltage-storage period, and the first driving voltage has a first low-level voltage during a second initialization period.

公开(公告)号：US10158076B2

公开(公告)日：2018-12-18

申请号：US15654149

申请日：2017-07-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Bon Yong Koo ,  Young Wan Seo

IPC: G02F1/136 ,  H01L51/00 ,  H01L51/05 ,  G02F1/1335 ,  H01L27/11

Abstract: The display device includes a first base portion; a semiconductor layer disposed on the first base portion and including a source region, a drain region and a channel region; a first insulating layer disposed on the semiconductor layer; a gate line disposed on the first insulating layer extending in a first direction and overlapping the channel region; a second insulating layer disposed on the gate line; a first connection plug formed in the first and second insulating layer filling a first connection hole exposing the source region; a second connection plug formed in the first and second insulating layer filling a second connection hole exposing the drain region; a first and second conductive pattern disposed on the second insulating layer; a pixel electrode disposed on the second insulating layer and electrically connected to the first conductive pattern; and a data line disposed on the second insulating layer to extend in a second direction.

公开(公告)号：US10078995B2

公开(公告)日：2018-09-18

申请号：US15084022

申请日：2016-03-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jong Hee Kim ,  Ji Sun Kim ,  Young Wan Seo ,  Jae Keun Lim ,  Chong Chul Chai

IPC: G09G5/00 ,  H03K17/687 ,  G09G3/3266 ,  G09G3/36

CPC classification number: G09G5/00 ,  G09G3/3266 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08

Abstract: A gate driver includes a plurality of stage circuits to output a clock signal from the outside as gate signals. A jth stage circuit includes an input unit to charge a first node at an initial voltage when a first input signal is input to a first input terminal, a buffer unit to output the clock signal as a gate signal to an output terminal when the initial voltage is supplied to the first node, a holding unit to maintain the first node at a reset power source level when the clock signal is supplied to the holding unit, and an inverter unit to supply the clock signal or the reset power source to the holding unit. The input unit maintains the first node at a second input signal input voltage to a second input terminal when a third input signal is input to a third input terminal.

公开(公告)号：US09870730B2

公开(公告)日：2018-01-16

申请号：US14920596

申请日：2015-10-22

Applicant: Samsung Display Co., Ltd.

Inventor： Jong Hee Kim ,  Ji-Sun Kim ,  Jun Hyun Park ,  Young Wan Seo ,  Jae Keun Lim ,  Chong Chul Chai

IPC: G09G3/36 ,  G09G3/20 ,  H03K19/0175

CPC classification number: G09G3/2092 ,  G09G2310/0286 ,  H03K19/017509

Abstract: A gate circuit according to an exemplary embodiment of the present inventive concept comprises a plurality of stages, each receiving a clock signal and outputting a gate signal and a carry signal. One of the plurality of stages includes a first transistor of which a first terminal and a control terminal are connected to each other and a carry signal of a stage before previous stage is input to the first terminal and the control terminal and a second transistor of which a gate signal of the previous stage is input to a first terminal, a control terminal is connected with a second terminal of the first transistor, and an output terminal is connected to a first node.

公开(公告)号：US11411065B2

公开(公告)日：2022-08-09

申请号：US16940904

申请日：2020-07-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kang Moon Jo ,  Young Wan Seo ,  Chong Chul Chai

IPC: H01L29/08 ,  H01L27/32 ,  G09G3/32

Abstract: A display device includes a first pixel including a first transistor, a second transistor, and a third transistor, a second pixel disposed adjacent to the first pixel in a first direction, and including a first transistor, a second transistor, and a third transistor, and an initialization voltage line disposed between the first pixel and the second pixel, and extending in a second direction crossing the first direction. The second transistor of the first pixel and the second transistor of the second pixel are connected to the initialization voltage line. The first, second, and third transistors of the first pixel and the first, second, and third transistors of the second pixel are symmetrical with respect to the initialization voltage line.

公开(公告)号：US11217176B2

公开(公告)日：2022-01-04

申请号：US16998504

申请日：2020-08-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Seung Chan Lee ,  Dong Hyun Kim ,  Hyeong Seok Kim ,  Young Wan Seo

IPC: G09G3/3258 ,  H01L27/32 ,  G09G3/3266 ,  H04N5/225 ,  G06K9/00

Abstract: A display device includes: a display panel including a first area and a second area, wherein the first area includes first sub-pixels, and the second area includes second sub-pixels; and a power supply unit that generates a first driving voltage and a second driving voltage greater than the first driving voltage to supply the first and second driving voltages to the display panel. The first sub-pixels receive the first driving voltage, and the second sub-pixels receive the first driving voltage or the second driving voltage.

公开(公告)号：US10599239B2

公开(公告)日：2020-03-24

申请号：US15239719

申请日：2016-08-17

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji Sun Kim ,  Young Wan Seo ,  Yu Jin Lee

IPC: G06F3/041 ,  H01L27/12 ,  G06F3/044

Abstract: An array substrate for a touch sensor in-cell type display device is disclosed. The array includes a base substrate, a plurality of pixels disposed on the base substrate and including a plurality of pixel rows and a plurality of pixel columns, a gate line extending in a first direction on the base substrate and disposed above and below in each pixel row, a data line extending in a second direction intersecting with the first direction on the base substrate and disposed in every two pixel columns, a touch sensing line extending in the second direction on the base substrate and parallel to the data line, a plurality of touch blocks provided by grouping the plurality of pixels by a predetermined number on the base substrate, and a common electrode disposed in each of the plurality of touch blocks.

公开(公告)号：US10388220B2

公开(公告)日：2019-08-20

申请号：US15698420

申请日：2017-09-07

Applicant: Samsung Display Co., Ltd.

Inventor： Bo Yong Chung ,  Jun Hyun Park ,  Young Wan Seo ,  An Su Lee ,  Kang Moon Jo ,  Chong Chul Chai

IPC: G09G3/3233 ,  H01L51/52

Abstract: A pixel including an organic light emitting diode; a first transistor for controlling the amount of current flowing from a first driving power source to a second driving power source via the organic light emitting diode, corresponding to a voltage of a first node; a second transistor coupled between the first node and a second node, the second transistor being turned on when a scan signal is supplied to an ith (i is a natural number) scan line; a third transistor coupled between the second node and an anode electrode of the organic light emitting diode; a first capacitor coupled between a data line and the second node; and a fourth transistor coupled between an initialization power source and the anode electrode of the organic light emitting diode. The fourth transistor is turned on in response to a first control signal being supplied to a first control line.

公开(公告)号：US09865218B2

公开(公告)日：2018-01-09

申请号：US14642389

申请日：2015-03-09

Applicant: Samsung Display Co. Ltd.

Inventor： Ji Sun Kim ,  Won Sik Oh ,  Yeong Keun Kwon ,  Young Wan Seo ,  Young Soo Yoon ,  Chong Chul Chai

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3611 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2310/0297 ,  G09G2310/08 ,  G09G2330/021

Abstract: A display device includes pixels arranged in a matrix form, gate lines extending in a first direction; data lines extending in a second direction, first and second unit pixel columns, each defined by adjacent data lines and the pixels connected thereto, first and second channels which transmit data signals to each of the first and second unit pixel columns, and a line selector which connects the first and second channels to the data lines and provides data voltages to the data lines in response to control signals, where a pixel connected to a first gate line is connected to a data line at a side thereof, a pixel connected to a second gate line is connected to a data line at the other side thereof, and each of the first and second channels is connected to a data line of each of the first and second unit pixel columns.