公开(公告)号：US20230111854A1

公开(公告)日：2023-04-13

申请号：US17851245

申请日：2022-06-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JU-IL CHOI ,  UN-BYOUNG KANG ,  MINSEUNG YOON ,  YONGHOE CHO ,  JEONGGI JIN ,  YUN SEOK CHOI

IPC: H01L25/10 ,  H01L23/538 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/48

Abstract: Provided is a semiconductor package, including a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, first bumps between the first redistribution substrate and the first semiconductor chip, a conductive structure on the first redistribution substrate and spaced apart from the first semiconductor chip, a second redistribution substrate on the first semiconductor chip, second bumps between the first semiconductor chip and the second redistribution substrate, a second semiconductor chip on the second redistribution substrate, a first mold layer between the first redistribution substrate and the second redistribution substrate, and on the first semiconductor chip, and a second mold layer on the second redistribution substrate and the second semiconductor chip, and spaced apart from the first mold layer.

公开(公告)号：US20230103196A1

公开(公告)日：2023-03-30

申请号：US17740508

申请日：2022-05-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYUHO KANG ,  JONGHO PARK ,  SEONG-HOON BAE ,  JEONGGI JIN ,  JU-IL CHOI ,  ATSUSHI FUJISAKI

IPC: H01L23/48 ,  H01L25/10 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor device includes a first redistribution substrate, a semiconductor chip on a top surface of the first redistribution substrate, a conductive structure on the top surface of the first redistribution substrate and laterally spaced apart from the semiconductor chip, and a molding layer on the first redistribution substrate and covering a sidewall of the semiconductor chip and a sidewall of the conductive structure. The conductive structure includes a first conductive structure having a first sidewall, and a second conductive structure on a top surface of the first conductive structure and having a second sidewall. The first conductive structure has an undercut at a lower portion of the first sidewall. The second conductive structure has a protrusion at a lower portion of the second sidewall.

公开(公告)号：US20220077043A1

公开(公告)日：2022-03-10

申请号：US17306988

申请日：2021-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GYUHO KANG ,  SEONG-HOON BAE ,  JIN HO AN ,  TEAHWA JEONG ,  JU-IL CHOI ,  ATSUSHI FUJISAKI

IPC: H01L23/498 ,  H01L25/065 ,  H01L25/10 ,  H01L23/00

Abstract: A semiconductor package includes; a redistribution substrate including a redistribution pattern, a semiconductor chip mounted on a top surface of the redistribution substrate, and a connection terminal between the semiconductor chip and the redistribution substrate. The redistribution substrate further includes; a pad structure including a pad interconnection and a pad via, disposed between the redistribution pattern and the connection terminal, wherein the pad structure is electrically connected to the redistribution pattern and a top surface of the pad structure contacts the connection terminal, a shaped insulating pattern disposed on a top surface of the redistribution pattern, and a pad seed pattern disposed on the redistribution pattern and covering the shaped insulating pattern.

公开(公告)号：US20210090984A1

公开(公告)日：2021-03-25

申请号：US16830361

申请日：2020-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： JINHO CHUN ,  JIN HO AN ,  TEAHWA JEONG ,  JEONGGI JIN ,  JU-IL CHOI ,  ATSUSHI FUJISAKI

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48

Abstract: There are provided semiconductor packages including a redistribution substrate and a semiconductor chip mounted on the redistribution substrate. The redistribution substrate may include a lower protective layer, a first conductive pattern disposed on the lower protective layer, a first insulating layer surrounding the first conductive pattern and disposed on the lower protective layer, and a second insulating layer disposed on the first insulating layer. The first insulating layer may include a first upper surface that includes a first flat portion extending parallel to an upper surface of the lower protective layer, and a first recess facing the lower protective layer and in contact with the first conductive pattern. The first recess may be directly connected to the first conductive pattern.