Semiconductor device, a parallel interface system and methods thereof
    11.
    发明授权
    Semiconductor device, a parallel interface system and methods thereof 有权
    半导体器件,并行接口系统及其方法

    公开(公告)号:US08842794B2

    公开(公告)日:2014-09-23

    申请号:US13714473

    申请日:2012-12-14

    CPC classification number: G11C7/22 H03K19/0966 H04L7/0008 H04L7/033 H04L7/10

    Abstract: A method of communication to a semiconductor device includes: transmitting a sampling clock signal from a first semiconductor device to a second semiconductor device; transmitting a training signal from the first semiconductor device to the second semiconductor device while transmitting of the sampling clock signal, the training signal comprising plural test patterns sent sequentially to the second semiconductor device, phases of at least some of the test patterns being adjusted to be different from each other during transmitting of the training signal; receiving first information from the second semiconductor device over a first signal line, the first signal line separate from a data bus connected between the first semiconductor device and the second semiconductor device; and transmitting a data signal over the data bus while transmitting the sampling clock signal, the data signal sent at a timing with respect to the sampling clock signal responsive to the received first information.

    Abstract translation: 一种与半导体器件通信的方法包括:将采样时钟信号从第一半导体器件传输到第二半导体器件; 在将所述采样时钟信号发送的同时将训练信号从所述第一半导体器件传输到所述第二半导体器件,所述训练信号包括顺序发送到所述第二半导体器件的多个测试图案,所述至少一些所述测试图案的相位被调整为 在训练信号的发送期间彼此不同; 通过第一信号线从第二半导体器件接收第一信息,第一信号线与连接在第一半导体器件和第二半导体器件之间的数据总线分开; 并且在发送采样时钟信号的同时,通过数据总线发送数据信号,所述数据信号响应于所接收到的第一信息而相对于采样时钟信号在定时发送。

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