公开(公告)号：US12094794B2

公开(公告)日：2024-09-17

申请号：US18054295

申请日：2022-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeongkwon Ko ,  Seunghun Shin ,  Junyeong Heo

IPC: H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L23/3128 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/565 ,  H01L21/78 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/16227 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06586

Abstract: Disclosed are semiconductor packages and/or methods of fabricating the same. The semiconductor package comprises a substrate, a semiconductor chip on the substrate, and a molding layer. The semiconductor chip includes a circuit region and an edge region around the circuit region. The molding layer covers a sidewall of the semiconductor chip. The semiconductor chip includes a reforming layer on the edge region. A top surface of the reforming layer is coplanar with a top surface of the molding layer.

公开(公告)号：US11515226B2

公开(公告)日：2022-11-29

申请号：US17117588

申请日：2020-12-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yeongkwon Ko ,  Seunghun Shin ,  Junyeong Heo

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: Disclosed are semiconductor packages and/or methods of fabricating the same. The semiconductor package comprises a substrate, a semiconductor chip on the substrate, and a molding layer. The semiconductor chip includes a circuit region and an edge region around the circuit region. The molding layer covers a sidewall of the semiconductor chip. The semiconductor chip includes a reforming layer on the edge region. A top surface of the reforming layer is coplanar with a top surface of the molding layer.