公开(公告)号：US06993202B2

公开(公告)日：2006-01-31

申请号：US10082280

申请日：2002-02-26

申请人： Susumu Igarashi ,  Tetsuya Tateno ,  Makoto Sato ,  Yukio Chiba ,  Katsumi Otsuka

发明人： Susumu Igarashi ,  Tetsuya Tateno ,  Makoto Sato ,  Yukio Chiba ,  Katsumi Otsuka

IPC分类号： G06K9/36 ,  G06K9/46

CPC分类号： H03M7/42 ,  H04N19/13 ,  H04N19/60 ,  H04N19/61

摘要： A decoding apparatus has: M tables for storing, in correspondence with M types of variable-length code tables, minimum code words or maximum code words of classes of variable-length code words constructing a variable-length code table; a table selector which selects one table from the M tables; N comparators which compare input coded data with the minimum code words or maximum code words outputted from the table selected by the table selector; a switch circuit and a priority encoder which obtain a class number corresponding to an initial code word of the input coded data based on results of comparison by the N comparators; a code length converter which converts the class number into a code length; and an address generator which generates an address to access a memory holding decoded data from the class number and the code length outputted said code length converter. The data outputted from the memory based on the address becomes decoded data of the input coded data.

摘要翻译： 解码装置具有：M表，用于存储与M类型的可变长度代码表相对应的最小代码字或构成可变长度代码表的可变长度代码字的类别的最大代码字; 表选择器，从M表中选择一个表; N个比较器，其将输入编码数据与从表选择器选择的表输出的最小码字或最大码字进行比较; 基于所述N个比较器的比较结果，获得与所述输入编码数据的初始码字对应的类号的开关电路和优先编码器; 将类号转换为码长的码长转换器; 以及地址发生器，其生成地址以访问存储来自类号码的解码数据的存储器和输出所述码长转换器的码长度。 基于地址从存储器输出的数据成为输入编码数据的解码数据。

公开(公告)号：US06947602B2

公开(公告)日：2005-09-20

申请号：US10021247

申请日：2001-12-19

申请人： Susumu Igarashi ,  Tetsuya Tateno ,  Makoto Satoh ,  Yukio Chiba ,  Katsumi Otsuka

发明人： Susumu Igarashi ,  Tetsuya Tateno ,  Makoto Satoh ,  Yukio Chiba ,  Katsumi Otsuka

IPC分类号： H04N7/26 ,  H04N7/30 ,  H04N7/50 ,  G06K9/36

CPC分类号： H04N19/423 ,  H04N19/60 ,  H04N19/61

摘要： Whether a header information processor quickly enters a program inactive state at the timing when it issues an operation start command of an encoding process for a predetermined processing unit to a variable-length code encoder, or the header information processor enters the program inactive state upon completion of execution steps to be processed is adaptively selected in accordance with the number of execution steps. One memory is shared by the header information processor and variable-length code encoder, and address input permission means for controlling to grant permission of an address input to the memory to one of the header information processor and the variable-length code encoder is provided. The memory is used as a work area of the header information processor, and as a storage area of a variable-length code table which is looked up by the variable-length code encoder.

摘要翻译： 在向可变长度码编码器发出预定处理单元的编码处理的操作开始命令的定时，头信息处理器是否快速进入程序无效状态，或者头信息处理器在完成时进入程序无效状态 根据执行步骤的数量自适应地选择要处理的执行步骤。 一个存储器由标题信息处理器和可变长度代码编码器共享，并且提供地址输入许可装置，用于控制将对存储器输入的地址的许可授予标题信息处理器和可变长度代码编码器之一。 存储器用作标题信息处理器的工作区域，并且作为可变长度代码编码器查找的可变长度代码表的存储区域。