公开(公告)号：US10164612B2

公开(公告)日：2018-12-25

申请号：US15254373

申请日：2016-09-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yukio Maehashi ,  Seiichi Yoneda ,  Wataru Uesugi

IPC: H03K3/289 ,  H03K3/012 ,  H03K3/356

Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.

公开(公告)号：US09935143B2

公开(公告)日：2018-04-03

申请号：US15272093

申请日：2016-09-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru ,  Yukio Maehashi

IPC: H01L27/108 ,  H01L29/10 ,  H01L27/146 ,  H01L29/24 ,  H01L29/786 ,  H04N5/378

CPC classification number: H01L27/14616 ,  H01L27/14636 ,  H01L29/24 ,  H01L29/7869 ,  H04N5/378

Abstract: A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for writing, a global bit line pair for reading, and a local bit line pair. The first circuit includes second to fifth circuits. The second to fifth circuits are electrically connected to each other by the local bit line pair. The second circuit functions as a read/write selection switch. The third circuit functions as a working memory that stores 1-bit complementary data temporarily. The fourth circuit has a function of precharging the local bit line pair. The fifth circuit includes n (n is an integer of 2 or more) sixth circuits. The sixth circuits each have a function of retaining 1-bit complementary data written from the third circuit.