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    Storage circuit and semiconductor device
    1.
    发明授权
    Storage circuit and semiconductor device 有权
    存储电路和半导体器件

    公开(公告)号：US09438206B2

    公开(公告)日：2016-09-06

    申请号：US14471322

    申请日：2014-08-28

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yukio Maehashi ,  Seiichi Yoneda ,  Wataru Uesugi

    IPC: H03K3/356 ,  H03K3/012

    CPC classification number: H03K3/012 ,  H03K3/356 ,  H03K3/356104

    Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.

    Abstract translation: 存储电路包括第一和第二逻辑电路，其沟道形成区域包括氧化物半导体的第一和第二晶体管以及电容器。 第一和第二晶体管串联连接，电容器连接到第一和第二晶体管的连接节点。 第一晶体管用作控制第一逻辑电路的输出端子和电容器之间的连接的开关。 第二晶体管用作控制电容器和第二逻辑电路的输入端之间的连接的开关。 其相位相互反相的时钟信号被输入到第一和第二晶体管的栅极。 由于存储电路具有少量晶体管和由时钟信号控制的少量晶体管，所以存储电路是低功率电路。

    Circuit including transistor
    2.
    发明授权
    Circuit including transistor 有权
    电路包括晶体管

    公开(公告)号：US09300292B2

    公开(公告)日：2016-03-29

    申请号：US14591274

    申请日：2015-01-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Wataru Uesugi ,  Yukio Maehashi

    IPC: H03K19/00 ,  H03K19/0185 ,  H03K19/094 ,  H01L29/786 ,  H01L27/06

    CPC classification number: H03K19/0013 ,  H01L27/0688 ,  H01L29/7869 ,  H01L29/78696 ,  H03K19/01855

    Abstract: The power consumption of a semiconductor device that can function as a latch circuit or the like is reduced. The semiconductor device includes a first circuit and a switch that controls conduction between an input terminal and the first circuit. The first circuit includes n second circuits (n is an integer of 2 or more) and a variable resistor. An output node of any of the n second circuits is electrically connected to an input node of the second circuit in a first stage through the variable resistor. The variable resistor can be, for example, a transistor whose channel is formed in an oxide semiconductor layer. A reduction in the number of elements or signals leads to a reduction of the power consumption of the semiconductor device.

    Abstract translation: 可以用作锁存电路等的半导体器件的功耗降低。 半导体器件包括第一电路和控制输入端和第一电路之间的导通的开关。 第一电路包括n个第二电路（n是2或更大的整数）和可变电阻器。 n个第二电路中的任一个的输出节点通过可变电阻器在第一级中电连接到第二电路的输入节点。 可变电阻器可以是例如其通道形成在氧化物半导体层中的晶体管。 元件或信号的数量的减少导致半导体器件的功耗的降低。

    Memory cell including transistor and capacitor
    3.
    发明授权
    Memory cell including transistor and capacitor 有权
    存储单元包括晶体管和电容

    公开(公告)号：US09406348B2

    公开(公告)日：2016-08-02

    申请号：US14577491

    申请日：2014-12-19

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yukio Maehashi

    IPC: G11C5/06 ,  H01L27/11 ,  G11C11/24 ,  G11C7/10

    CPC classification number: G11C5/06 ,  G11C5/063 ,  G11C7/1075 ,  G11C8/14 ,  G11C8/16 ,  G11C11/24 ,  G11C2207/2209 ,  H01L27/1116

    Abstract: A semiconductor storage device capable of performing low-voltage operation, reducing standby current, and decreasing memory size is provided. The semiconductor storage device is a semiconductor device including first to fourth transistors and a capacitor. The first transistor has a function of supplying a first signal to the capacitor. The capacitor has a function of accumulating electric charge based on the first signal. The second transistor has a function of supplying the electric charge based on the first signal to a gate of the third transistor. The third transistor has a function of outputting a first potential to a wiring and a function of supplying the first potential to a gate of the fourth transistor. The fourth transistor has a function of supplying a second potential to the capacitor through the second transistor.

    Abstract translation: 提供一种能够进行低电压操作，降低待机电流和减小存储器大小的半导体存储装置。 半导体存储装置是包括第一至第四晶体管和电容器的半导体器件。 第一晶体管具有向电容器提供第一信号的功能。 电容器具有基于第一信号累积电荷的功能。 第二晶体管具有基于第一信号将电荷提供给第三晶体管的栅极的功能。 第三晶体管具有向布线输出第一电位的功能和向第四晶体管的栅极提供第一电位的功能。 第四晶体管具有通过第二晶体管向电容器提供第二电位的功能。

    SEMICONDUCTOR DEVICE
    4.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150187778A1

    公开(公告)日：2015-07-02

    申请号：US14577491

    申请日：2014-12-19

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yukio Maehashi

    IPC: H01L27/11 ,  H01L29/786 ,  H01L27/12

    CPC classification number: G11C5/06 ,  G11C5/063 ,  G11C7/1075 ,  G11C8/14 ,  G11C8/16 ,  G11C11/24 ,  G11C2207/2209 ,  H01L27/1116

    Abstract: A semiconductor storage device capable of performing low-voltage operation, reducing standby current, and decreasing memory size is provided. The semiconductor storage device is a semiconductor device including first to fourth transistors and a capacitor. The first transistor has a function of supplying a first signal to the capacitor. The capacitor has a function of accumulating electric charge based on the first signal. The second transistor has a function of supplying the electric charge based on the first signal to a gate of the third transistor. The third transistor has a function of outputting a first potential to a wiring and a function of supplying the first potential to a gate of the fourth transistor. The fourth transistor has a function of supplying a second potential to the capacitor through the second transistor.

    Abstract translation: 提供一种能够进行低电压操作，降低待机电流和减小存储器大小的半导体存储装置。 半导体存储装置是包括第一至第四晶体管和电容器的半导体器件。 第一晶体管具有向电容器提供第一信号的功能。 电容器具有基于第一信号累积电荷的功能。 第二晶体管具有基于第一信号将电荷提供给第三晶体管的栅极的功能。 第三晶体管具有向布线输出第一电位的功能和向第四晶体管的栅极提供第一电位的功能。 第四晶体管具有通过第二晶体管向电容器提供第二电位的功能。

    Signal processing circuit
    5.
    发明授权
    Signal processing circuit 有权
    信号处理电路

    公开(公告)号：US08958252B2

    公开(公告)日：2015-02-17

    申请号：US14272598

    申请日：2014-05-08

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Hidetomo Kobayashi ,  Yukio Maehashi

    IPC: G11C7/10 ,  G11C11/4074 ,  G11C11/407

    CPC classification number: G11C11/4074 ,  G11C7/1006 ,  G11C11/407 ,  G11C2207/2227

    Abstract: To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off.

    Abstract translation: 为了提供包括具有新颖结构的非易失性存储器电路的信号处理电路，信号处理电路包括用于控制运算部分和存储器的运算部分，存储器和控制部分。 控制部分包括一组易失性存储器电路和用于存储在易失性存储器电路中的数据的第一非易失性存储器电路，存储器包括多个第二非易失性存储器电路，以及第一非易失性存储器电路和第二非易失性存储器电路 每个都包括在氧化物半导体层中具有通道的晶体管和一个电容器，其中一对电极中的一个电极电连接到当晶体管截止时被设置为浮置状态的节点。

    SIGNAL PROCESSING CIRCUIT
    6.
    发明申请
    SIGNAL PROCESSING CIRCUIT 有权
    信号处理电路

    公开(公告)号：US20140247650A1

    公开(公告)日：2014-09-04

    申请号：US14272598

    申请日：2014-05-08

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Hidetomo Kobayashi ,  Yukio Maehashi

    IPC: G11C11/4074 ,  G11C11/407

    CPC classification number: G11C11/4074 ,  G11C7/1006 ,  G11C11/407 ,  G11C2207/2227

    Abstract: To provide a signal processing circuit including a nonvolatile memory circuit with a novel structure, the signal processing circuit includes an arithmetic portion, a memory, and a control portion for controlling the arithmetic portion and the memory. The control portion includes a set of a volatile memory circuit and a first nonvolatile memory circuit for storing data held in the volatile memory circuit, the memory includes a plurality of second nonvolatile memory circuits, and the first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor having a channel in an oxide semiconductor layer and a capacitor in which one of a pair of electrodes is electrically connected to a node which is set in a floating state when the transistor is turned off.

    Abstract translation: 为了提供包括具有新颖结构的非易失性存储器电路的信号处理电路，信号处理电路包括用于控制运算部分和存储器的运算部分，存储器和控制部分。 控制部分包括一组易失性存储器电路和用于存储在易失性存储器电路中的数据的第一非易失性存储器电路，存储器包括多个第二非易失性存储器电路，以及第一非易失性存储器电路和第二非易失性存储器电路 每个都包括在氧化物半导体层中具有通道的晶体管和一个电容器，其中一对电极中的一个电极电连接到当晶体管截止时被设置为浮置状态的节点。

    Semiconductor device, wireless sensor, and electronic device
    8.
    发明授权
    Semiconductor device, wireless sensor, and electronic device 有权
    半导体器件，无线传感器和电子设备

    公开(公告)号：US09569713B2

    公开(公告)日：2017-02-14

    申请号：US14920161

    申请日：2015-10-22

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Seiichi Yoneda ,  Yukio Maehashi

    IPC: G06K19/06 ,  G06K19/07 ,  G06K19/077 ,  G06K19/073

    CPC classification number: G06K19/0716 ,  G06K19/0702 ,  G06K19/073 ,  G06K19/07707

    Abstract: To provide a semiconductor device that is capable of displaying data even when a radio signal is not supplied. The semiconductor device includes an antenna, a battery, a sensor, a nonvolatile memory, a first circuit, and a second circuit. Power supplied from the antenna is converted into first power via the first circuit. The battery stores the first power and supplies second power. The sensor performs sensing with the second power. The nonvolatile memory stores analog data acquired by the sensor. The second power is used to store the analog data. The second circuit converts the analog data into digital data with the use of the first power. The nonvolatile memory preferably includes an oxide semiconductor transistor.

    Abstract translation: 提供即使在不提供无线电信号的情况下也能够显示数据的半导体器件。 半导体器件包括天线，电池，传感器，非易失性存储器，第一电路和第二电路。 从天线供电的电源经由第一电路转换为第一电源。 电池存储第一个电源并提供第二个电源。 传感器用第二个电源进行感测。 非易失性存储器存储由传感器获取的模拟数据。 第二个电源用于存储模拟数据。 第二个电路通过使用第一个电源将模拟数据转换成数字数据。 非易失性存储器优选地包括氧化物半导体晶体管。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150200668A1

    公开(公告)日：2015-07-16

    申请号：US14591274

    申请日：2015-01-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Wataru Uesugi ,  Yukio Maehashi

    IPC: H03K19/00 ,  H01L27/06 ,  H03K19/0185 ,  H01L29/786

    CPC classification number: H03K19/0013 ,  H01L27/0688 ,  H01L29/7869 ,  H01L29/78696 ,  H03K19/01855

    Abstract: The power consumption of a semiconductor device that can function as a latch circuit or the like is reduced. The semiconductor device includes a first circuit and a switch that controls conduction between an input terminal and the first circuit. The first circuit includes n second circuits (n is an integer of 2 or more) and a variable resistor. An output node of any of the n second circuits is electrically connected to an input node of the second circuit in a first stage through the variable resistor. The variable resistor can be, for example, a transistor whose channel is formed in an oxide semiconductor layer. A reduction in the number of elements or signals leads to a reduction of the power consumption of the semiconductor device.

    Abstract translation: 可以用作锁存电路等的半导体器件的功耗降低。 半导体器件包括第一电路和控制输入端和第一电路之间的导通的开关。 第一电路包括n个第二电路（n是2或更大的整数）和可变电阻器。 n个第二电路中的任一个的输出节点通过可变电阻器在第一级中电连接到第二电路的输入节点。 可变电阻器可以是例如其通道形成在氧化物半导体层中的晶体管。 元件或信号的数量的减少导致半导体器件的功耗的降低。

    Storage Circuit and Semiconductor Device
    10.
    发明申请
    Storage Circuit and Semiconductor Device 有权
    存储电路和半导体器件

    公开(公告)号：US20150061742A1

    公开(公告)日：2015-03-05

    申请号：US14471322

    申请日：2014-08-28

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Yukio Maehashi ,  Seiichi YONEDA ,  Wataru UESUGI

    IPC: H03K3/012 ,  H03K3/356

    CPC classification number: H03K3/012 ,  H03K3/356 ,  H03K3/356104

    Abstract: The storage circuit includes first and second logic circuits, first and second transistors whose channel formation regions include an oxide semiconductor, and a capacitor. The first and second transistors are connected to each other in series, and the capacitor is connected to a connection node of the first and second transistors. The first transistor functions as a switch that controls connection between an output terminal of the first logic circuit and the capacitor. The second transistor functions as a switch that controls connection between the capacitor and an input terminal of the second logic circuit. Clock signals whose phases are inverted from each other are input to gates of the first and second transistors. Since the storage circuit has a small number of transistors and a small number of transistors controlled by the clock signals, the storage circuit is a low-power circuit.

    Abstract translation: 存储电路包括第一和第二逻辑电路，其沟道形成区域包括氧化物半导体的第一和第二晶体管以及电容器。 第一和第二晶体管串联连接，电容器连接到第一和第二晶体管的连接节点。 第一晶体管用作控制第一逻辑电路的输出端子和电容器之间的连接的开关。 第二晶体管用作控制电容器和第二逻辑电路的输入端之间的连接的开关。 其相位相互反相的时钟信号被输入到第一和第二晶体管的栅极。 由于存储电路具有少量晶体管和由时钟信号控制的少量晶体管，所以存储电路是低功率电路。

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