Rectangular planar-type ICP antenna having balanced ratio of magnetic field and electric potential
    11.
    发明申请
    Rectangular planar-type ICP antenna having balanced ratio of magnetic field and electric potential 审中-公开
    具有平衡磁场和电位比的矩形平面型ICP天线

    公开(公告)号:US20070163500A1

    公开(公告)日:2007-07-19

    申请号:US11483894

    申请日:2006-07-10

    CPC classification number: H01J37/32174 H01J37/321

    Abstract: The rectangular planar-type ICP (Inductively Coupled Plasma) antenna having a balanced ratio of a magnetic field and an electric potential is capable of improving uniformity of plasma as well as improving a density of plasma. The planar-type ICP antenna includes first and second antenna elements spirally shaped outwards from an end thereof, respectively. The ends of the fist and second antenna elements are interconnected by means of a grounded common terminal. A RF power source is connected to a powered common terminal for connecting first and second powered terminals that are the other ends of the first and second antenna elements. The first and second powered terminals are arranged in peripheral portions of the antenna and the grounded common terminal is arranged in a center portion of the antenna in order to compensate for a drop of plasma ion flux in a region to which power is applied.

    Abstract translation: 具有磁场和电位平衡比的矩形平面型ICP(电感耦合等离子体)天线能够提高等离子体的均匀性以及提高等离子体的密度。 平面型ICP天线分别包括从端部向外螺旋形的第一和第二天线元件。 第一和第二天线元件的端部通过接地的公共端子相互连接。 RF电源连接到用于连接作为第一和第二天线元件的另一端的第一和第二电源端子的供电公共端子。 第一和第二电源端子被布置在天线的周边部分中,并且接地的公共端子被布置在天线的中心部分中,以便补偿施加电力的区域中的等离子体离子通量的下降。

    Semiconductor device having spiral electrode pattern
    12.
    发明授权
    Semiconductor device having spiral electrode pattern 失效
    具有螺旋电极图案的半导体器件

    公开(公告)号:US5780915A

    公开(公告)日:1998-07-14

    申请号:US772288

    申请日:1996-12-23

    Applicant: Seung-Ho Lee

    Inventor: Seung-Ho Lee

    CPC classification number: H01L31/1085

    Abstract: A semiconductor device having a spiral electrode pattern and fabrication method thereof. The device includes an undoped semiconductor substrate, a first and a second probing pads formed on the substrate, and a pair of electrode fingers extending spirally toward a concentric center from the respective first and second probing pads and interdigitated with each other. The method includes the steps of, patterning an insulation layer on a semiconductor substrate in a spiral structure, depositing a metal layer on the substrate including the insulation layer but excluding the sides of the insulation layer, and etching the insulation layer using a wet etching technique.

    Abstract translation: 一种具有螺旋电极图案的半导体器件及其制造方法。 该器件包括未掺杂的半导体衬底,形成在衬底上的第一和第二探测焊盘以及从相应的第一和第二探测焊盘螺旋地朝向同心中心延伸并彼此交错的一对电极指。 该方法包括以下步骤:在螺旋结构的半导体衬底上图形化绝缘层,在包括绝缘层但不包括绝缘层的侧面的衬底上沉积金属层,并使用湿蚀刻技术蚀刻绝缘层 。

    Skin resurfacing device, controlling apparatus and controlling method for skin resurfacing device

    公开(公告)号:US10507314B2

    公开(公告)日:2019-12-17

    申请号:US15272400

    申请日:2016-09-21

    Applicant: Seung-Ho Lee

    Inventor: Seung-Ho Lee

    Abstract: The present invention provides a controlling apparatus for a skin resurfacing device performing a surgical procedure on a human skin with a surgical needle, including: a controller 20; a voltage regulator 50 configured to regulate a voltage supplied to the skin resurfacing device from a power supply 10 according to a control of the controller; and a starting switch 80 configured to turn on/off a supply of power between the voltage regulator and the skin resurfacing device, in which the controller controls the voltage regulator so as to output a preset jump start voltage to the skin resurfacing device every time the starting switch is turned on, if a jump start function that is a function of starting the skin resurfacing device is set by a starting voltage when an operating voltage of the skin resurfacing device is lower than the starting voltage of the skin resurfacing device at the time of the surgical procedure.

    Substrate supporting unit and apparatus for treating substrate using the substrate supporting unit
    14.
    发明授权
    Substrate supporting unit and apparatus for treating substrate using the substrate supporting unit 失效
    基板支撑单元和使用基板支撑单元处理基板的装置

    公开(公告)号:US08123900B2

    公开(公告)日:2012-02-28

    申请号:US12284840

    申请日:2008-09-25

    CPC classification number: H01L21/67313 Y10S134/902

    Abstract: Provided are a substrate supporting unit and a substrate treating apparatus using the substrate supporting unit. The substrate supporting unit comprises a base plate and a supporting portion formed on the base plate. The supporting portion comprises two supporting rods and a plurality of supporting members. The two supporting rods extend in a predetermined direction to be separated from each other. The plurality of supporting members is disposed to be separated from each other in the predetermined direction. Each of the supporting members connects the supporting rods.

    Abstract translation: 提供了一种基板支撑单元和使用该基板支撑单元的基板处理装置。 基板支撑单元包括基板和形成在基板上的支撑部分。 支撑部分包括两个支撑杆和多个支撑构件。 两个支撑杆在预定方向上延伸以彼此分离。 多个支撑构件被设置成沿预定方向彼此分离。 每个支撑构件连接支撑杆。

    Flat lamp device with multi electron source array
    15.
    发明授权
    Flat lamp device with multi electron source array 失效
    具有多电子源阵列的扁平灯装置

    公开(公告)号:US07446469B2

    公开(公告)日:2008-11-04

    申请号:US11201652

    申请日:2005-08-10

    Applicant: Seung-Ho Lee

    Inventor: Seung-Ho Lee

    CPC classification number: H01J63/02 H01J63/06

    Abstract: A flat lamp device includes lower and upper glass plates facing each other in parallel; spacers interposed between the plates to keep a distance therebetween; a cathode electrode singly formed over the entire upper surface of the lower glass plate; an insulation film formed on the cathode electrode; semiconductor films independently patterned on the insulation at intervals; a catalyst metal layer laminated on a buffer metal layer to improve adhesive force of the catalyst metal formed on the semiconductor films; carbon nano-tubes formed on the catalyst metal layer; a grid electrode installed above the carbon nano-tubes between the plates to guide electron emission from the carbon nano-tubes with a mesh shape having an opening for passage of the emitted electrons; an anode electrode formed below the upper glass plate to accelerate the emitted electrons; and a fluorescent layer formed on a lower surface of the anode electrode.

    Abstract translation: 平板灯装置包括并列的彼此相对的下玻璃板和上玻璃板; 插入板之间的间隔件以保持它们之间的距离; 单独形成在下玻璃板的整个上表面上的阴极电极; 形成在阴极上的绝缘膜; 半导体膜间隔独立地在绝缘层上图案化; 层叠在缓冲金属层上的催化剂金属层,以改善形成在半导体膜上的催化剂金属的粘附力; 形成在催化剂金属层上的碳纳米管; 栅格电极安装在板之间的碳纳米管上方,以引导具有网孔形状的碳纳米管的电子发射,该网状形状具有用于发射电子通过的开口; 形成在上玻璃板下面以加速发射的电子的阳极电极; 以及形成在阳极电极的下表面上的荧光层。

    Flat lamp device with multi electron source array
    16.
    发明申请
    Flat lamp device with multi electron source array 失效
    具有多电子源阵列的扁平灯装置

    公开(公告)号:US20060244357A1

    公开(公告)日:2006-11-02

    申请号:US11201652

    申请日:2005-08-10

    Applicant: Seung-Ho Lee

    Inventor: Seung-Ho Lee

    CPC classification number: H01J63/02 H01J63/06

    Abstract: Disclosed is a flat lamp device, including lower and upper glass plates facing each other in parallel; spacers interposed between the plates to keep distance therebetween; a cathode electrode singly formed over the entire upper surface of the lower glass plate; an insulation film formed on the cathode electrode; semiconductor films independently patterned on the insulation film at intervals; a catalyst-metal layer laminated on the buffer metal to improve the adhesion of catalyst metal formed on the semiconductor films; carbon nano-tubes formed on the catalyst-metal layer; a grid electrode installed on the carbon nano-tubes between the plates to guide electron emission from the carbon nano-tubes with a mesh shape having an opening for passage of the emitted electrons; an anode electrode formed below the upper glass plate to accelerate the emitted electrons; and a fluorescent layer formed below the anode electrode to emit light by collision with the accelerated electrons.

    Abstract translation: 公开了一种扁平灯装置,包括并列相对的下玻璃板和上玻璃板; 插入板之间的间隔件以保持它们之间的距离; 单独形成在下玻璃板的整个上表面上的阴极电极; 形成在阴极上的绝缘膜; 间隔地在绝缘膜上独立构图的半导体膜; 层叠在缓冲金属上的催化剂 - 金属层,以改善形成在半导体膜上的催化剂金属的粘附性; 形成在催化剂 - 金属层上的碳纳米管; 安装在板之间的碳纳米管上的栅极,以引导具有网孔形状的碳纳米管的电子发射,该网状形状具有用于发射电子通过的开口; 形成在上玻璃板下面以加速发射的电子的阳极电极; 以及形成在阳极电极下方的荧光层,通过与加速电子的碰撞而发光。

    Method of isolating semiconductor devices
    17.
    发明授权
    Method of isolating semiconductor devices 有权
    隔离半导体器件的方法

    公开(公告)号:US6140207A

    公开(公告)日:2000-10-31

    申请号:US146750

    申请日:1998-09-04

    Applicant: Seung-Ho Lee

    Inventor: Seung-Ho Lee

    CPC classification number: H01L21/76229

    Abstract: The present invention relates to a method of isolating semiconductor devices enabling to prevent an active area from being reduced due to the increase of an isolation area by means of forming trenches, and includes the steps of forming a mask on a semiconductor substrate wherein the mask discloses field areas, forming a first and second trench in the field areas of the semiconductor substrate wherein the first trench has a larger size and a lower aspect ratio than those of the second trench and wherein the second trench has a smaller size and a higher aspect ratio than those of the first trench, depositing filling oxide on the mask and in the first and second trench by a method including characteristic of sputtering wherein the first and second trench are filled up with the filling oxide and a void is formed on a lower part of the second trench, and forming field oxide film by means of etching back the filling oxide to remain inside the first and second trench.

    Abstract translation: 本发明涉及一种隔离半导体器件的方法,其能够通过形成沟槽来防止由于隔离区域的增加而导致的有源区域的减小,并且包括在半导体衬底上形成掩模的步骤,其中掩模公开 场区域,在半导体衬底的场区域中形成第一和第二沟槽,其中第一沟槽具有比第二沟槽更大的尺寸和更低的纵横比,并且其中第二沟槽具有较小的尺寸和较高的纵​​横比 通过包括溅射特性的方法在掩模和第一和第二沟槽中沉积填充氧化物,其中第一和第二沟槽填充有填充氧化物,并且在下部形成空隙 并且通过蚀刻回填充氧化物形成场氧化膜以保持在第一和第二沟槽内。

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