公开(公告)号：US20220148975A1

公开(公告)日：2022-05-12

申请号：US17134925

申请日：2020-12-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Wei-Jhen Chen ,  Chih-Hsun Hsu ,  Yuan-Hung Hsu ,  Chih-Nan Lin ,  Chang-Fu Lin ,  Don-Son Jiang ,  Chih-Ming Huang ,  Yi-Hsin Chen

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L25/00

Abstract: An electronic package and a manufacturing method thereof, which embeds an electronic structure acting as an auxiliary functional component and a plurality of conductive pillars in an encapsulation layer, and disposes an electronic component on the encapsulation layer, so as to facilitate electrical transmission with the electronic component in a close range.

公开(公告)号：US11069661B1

公开(公告)日：2021-07-20

申请号：US16909043

申请日：2020-06-23

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Wei-Jhen Chen ,  Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H01L23/31

Abstract: An electronic package is formed by arranging two encapsulating portions of different materials between a plurality of electronic components stacked to each other to adjust a stress distribution of the electronic package, so that the degree of warpage of the electronic package can be optimally controlled.

公开(公告)号：US10863626B1

公开(公告)日：2020-12-08

申请号：US16669872

申请日：2019-10-31

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H05K3/30 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.

公开(公告)号：US20220392861A1

公开(公告)日：2022-12-08

申请号：US17369029

申请日：2021-07-07

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chi-Ren Chen ,  Po-Yung Chang ,  Pei-Geng Weng ,  Yuan-Hung Hsu ,  Chang-Fu Lin ,  Don-Son Jiang

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56

Abstract: An electronic package is provided and includes a carrier for carrying electronic components. Electrical contact pads of the carrier for planting solder balls are connected with a plurality of columnar conductors, and the conductors are electrically connected to a circuit portion in the carrier. By connecting a plurality of conductors with a single electrical contact pad, structural stress can be distributed and breakage of the circuit portion can be prevented.

公开(公告)号：US11482470B2

公开(公告)日：2022-10-25

申请号：US16872740

申请日：2020-05-12

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H01L23/433 ,  H01L21/48 ,  H01L23/00

Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.

公开(公告)号：US11410954B2

公开(公告)日：2022-08-09

申请号：US16922169

申请日：2020-07-07

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H01L23/00

Abstract: Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate.

公开(公告)号：US20210287962A1

公开(公告)日：2021-09-16

申请号：US16872740

申请日：2020-05-12

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Chang-Fu Lin ,  Yuan-Hung Hsu

IPC: H01L23/433 ,  H01L21/48 ,  H01L23/00

Abstract: An electronic package is provided and includes an electronic element, an intermediary structure disposed on the electronic element, and a heat dissipation element bonded to the electronic element through the intermediary structure. The intermediary structure has a flow guide portion and a permanent fluid combined with the flow guide portion so as to be in contact with the electronic element, thereby achieving a preferred heat dissipation effect and preventing excessive warping of the electronic element or the heat dissipation element due to stress concentration.

公开(公告)号：US20200258871A1

公开(公告)日：2020-08-13

申请号：US16856259

申请日：2020-04-23

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Han-Hung Chen ,  Yuan-Hung Hsu ,  Chang-Fu Lin ,  Rung-Jeng Lin ,  Fu-Tang Huang

IPC: H01L25/10 ,  H01L25/00

Abstract: The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.

公开(公告)号：US20180288886A1

公开(公告)日：2018-10-04

申请号：US15865999

申请日：2018-01-09

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Han-Hung Chen ,  Yuan-Hung Hsu ,  Chang-Fu Lin ,  Rung-Jeng Lin ,  Fu-Tang Huang

IPC: H05K3/46 ,  H01L21/02 ,  H01L23/498 ,  H01L21/56 ,  H05K1/18 ,  H05K3/34

Abstract: The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.

公开(公告)号：US12205906B2

公开(公告)日：2025-01-21

申请号：US18537638

申请日：2023-12-12

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Yu-Lung Huang ,  Chee-Key Chung ,  Yuan-Hung Hsu ,  Chi-Jen Chen

IPC: H01L23/00 ,  H01L21/768 ,  H01L23/538

Abstract: An electronic package is provided and includes a plurality of electronic elements, a spacing structure connecting each of the plurality of electronic elements, and a plurality of conductive elements electrically connected to the plurality of electronic elements and serving as external contacts. The spacing structure has a recess to enhance the flexibility of the electronic elements after the electronic elements are connected to one another, thereby preventing the problem of warpage. A method for fabricating the electronic package is also provided.