公开(公告)号：US20090146697A1

公开(公告)日：2009-06-11

申请号：US12137127

申请日：2008-06-11

Applicant: Jong Chern LEE

Inventor： Jong Chern LEE

IPC: H03K3/00

CPC classification number: H03K19/01707 ,  H03K19/01721 ,  H03K19/018528

Abstract: The buffer circuit includes a differential amplifier differentially amplifying a reference node corresponding to a reference voltage and an input node corresponding to the input signal by sensing a potential difference of the reference voltage and the input signal. A coupling unit couples the input signal to the reference node, making it possible to improve the operating speed of the buffer circuit and operate normally when a level of the input signal or the reference voltage becomes low.

Abstract translation: 缓冲电路包括差分放大器，通过感测参考电压和输入信号的电位差，差分放大对应于参考电压的参考节点和对应于输入信号的输入节点。 耦合单元将输入信号耦合到参考节点，使得当输入信号或参考电压的电平变低时，可以提高缓冲电路的工作速度并正常工作。

公开(公告)号：US20110242928A1

公开(公告)日：2011-10-06

申请号：US12970792

申请日：2010-12-16

Applicant: Jae Bum KO ,  Jong Chern LEE

Inventor： Jae Bum KO ,  Jong Chern LEE

IPC: G11C8/06 ,  G11C8/18

CPC classification number: G11C8/18 ,  G11C8/04

Abstract: An address delay circuit of a semiconductor memory apparatus includes a control pulse generation unit configured to generate a control pulse following a time corresponding to a predetermined multiple of cycles of a clock after a read write pulse is inputted; and a delay unit configured to output internal addresses when the control pulse is inputted, wherein the internal addresses are input as external addresses.

Abstract translation: 半导体存储装置的地址延迟电路包括：控制脉冲生成单元，被配置为在输入读取写入脉冲之后产生与时钟的预定倍数相对应的时间的控制脉冲; 以及延迟单元，被配置为当输入所述控制脉冲时输出内部地址，其中所述内部地址被输入为外部地址。

公开(公告)号：US20110102006A1

公开(公告)日：2011-05-05

申请号：US12651066

申请日：2009-12-31

Applicant: Min Seok CHOI ,  Jong Chern LEE ,  Sang Jin Byeon ,  Young Jun KU

Inventor： Min Seok CHOI ,  Jong Chern LEE ,  Sang Jin Byeon ,  Young Jun KU

IPC: G01R31/26 ,  G01R31/3187

CPC classification number: G01R31/318513

Abstract: A circuit for testing a semiconductor apparatus includes a test voltage applying unit configured to apply a test voltage to a first end of a through-silicon via (TSV) in response to a test mode signal and a detecting unit configured to be connected to a second end of the TSV and detect a current outputted from the second end of the TSV.

Abstract translation: 一种用于测试半导体装置的电路包括：测试电压施加单元，被配置为响应于测试模式信号将测试电压施加到穿硅通孔（TSV）的第一端;以及检测单元，被配置为连接到第二 结束TSV，并检测从TSV的第二端输出的电流。

公开(公告)号：US20090167417A1

公开(公告)日：2009-07-02

申请号：US12136429

申请日：2008-06-10

Applicant: Jong Sam KIM ,  Jong Chern LEE

Inventor： Jong Sam KIM ,  Jong Chern LEE

IPC: G05F1/10

CPC classification number: H02M3/073 ,  G11C5/145 ,  H02M1/32 ,  H02M2001/008

Abstract: A charge pumping circuit consumes less current by reducing the number of charge pumps operating simultaneously. The charge pumping circuit includes a voltage sensor that detects a level of a high voltage and outputs a control signal based on the detection result. An oscillator provides an oscillating clock signal in response to the control signal of the voltage sensor, and the oscillator sequentially outputs the clock signal as a plurality of clock signals having shifted phases A plurality of high-voltage pumps are disposed in a plurality of regions to pump the high voltage in response to the clock signals and a different phase is designated for each region.

Abstract translation: 电荷泵浦电路通过减少同时工作的电荷泵的数量来消耗较少的电流。 电荷泵送电路包括检测高电平的电压传感器，并且基于检测结果输出控制信号。 振荡器响应于电压传感器的控制信号提供振荡时钟信号，并且振荡器顺序地输出时钟信号作为多个具有偏移相位的时钟信号，多个高压泵被设置在多个区域中 根据时钟信号泵送高电压，并为每个区域指定不同的相位。