CURRENT LIMITING I/O INTERFACE AND ISOLATED LOAD SWITCH DRIVER IC

    公开(公告)号:US20190052262A1

    公开(公告)日:2019-02-14

    申请号:US16161124

    申请日:2018-10-16

    Abstract: Disclosed examples include isolated load switch driver circuits to drive a load, including an impedance circuit that receives a digital input voltage signal from a signal source, and selectively allows a current signal to flow from the signal source to charge a buffer capacitor. An impedance control circuit controls the impedance circuit to limit the current signal in response to the buffer capacitor reaching a first threshold voltage, and an output circuit provides an output isolated from the digital input voltage signal to switch the load. A signaling circuit selectively enables the output circuit to draw power from the buffer capacitor in response to the voltage of the buffer capacitor reaching the first threshold voltage.

    Drivers and Methods of Driving Transducers
    13.
    发明申请
    Drivers and Methods of Driving Transducers 审中-公开
    驱动传感器的驱动因素和方法

    公开(公告)号:US20160214140A1

    公开(公告)日:2016-07-28

    申请号:US15089752

    申请日:2016-04-04

    CPC classification number: B06B1/0284 B06B1/0292 H04R1/00 H04R3/06 H04R2217/03

    Abstract: A transducer has an input and produces a mechanical output, wherein the magnitude of the mechanical output of the transducer is dependent on the frequency and magnitude of current at the input. A driver for the transducer includes a device having a transfer function associated with the device, the device having a device input and a device output, the device output being connectable to the input of the transducer and the device input being connectable to a power source. The device attenuates the current output at a frequency that causes a peak in the magnitude of the mechanical output of the transducer.

    Abstract translation: 换能器具有输入并产生机械输出,其中换能器的机械输出的大小取决于输入端的电流的频率和幅度。 用于换能器的驱动器包括具有与装置相关联的传递功能的装置,所述装置具有装置输入和装置输出,所述装置输出可连接到所述换能器的输入端,所述装置输入可连接到电源。 该器件以导致换能器的机械输出大小的峰值的频率衰减电流输出。

    Drivers and methods of driving transducers
    14.
    发明授权
    Drivers and methods of driving transducers 有权
    驱动器和驱动换能器的方法

    公开(公告)号:US09338533B2

    公开(公告)日:2016-05-10

    申请号:US14204280

    申请日:2014-03-11

    CPC classification number: B06B1/0284 B06B1/0292 H04R1/00 H04R3/06 H04R2217/03

    Abstract: A transducer has an input and produces a mechanical output, wherein the magnitude of the mechanical output of the transducer is dependent on the frequency and magnitude of current at the input. A driver for the transducer includes a device having a transfer function associated with the device, the device having a device input and a device output, the device output being connectable to the input of the transducer and the device input being connectable to a power source. The device attenuates the current output at a frequency that causes a peak in the magnitude of the mechanical output of the transducer.

    Abstract translation: 换能器具有输入并产生机械输出,其中换能器的机械输出的大小取决于输入端的电流的频率和幅度。 用于换能器的驱动器包括具有与装置相关联的传递功能的装置,所述装置具有装置输入和装置输出,所述装置输出可连接到所述换能器的输入端,所述装置输入可连接到电源。 该器件以导致换能器的机械输出大小的峰值的频率衰减电流输出。

    Switched converter control using adaptive load current sensing and feedforward technique

    公开(公告)号:US10454369B2

    公开(公告)日:2019-10-22

    申请号:US15591107

    申请日:2017-05-10

    Abstract: A switched voltage converter may be controlled with load current feedforward control loop in addition to an output voltage feedback loop. The converter includes a first switch device that is controlled to open and close at a selected switching rate with a selected duty cycle. The first switch device is coupled in series with an inductor and conducts current through the inductor while the first switch is closed. A second switch device conducts current from the inductor to an output capacitor and to load while the first switch is open to produce an output voltage and a resulting load current through the load. The load current is measured in a continuous manner and a load current feedforward control signal is generated that is representative of the load current. The switch rate and/or duty cycle of the first switch is adjusted in response to the load current feedforward control signal.

    Current limiting I/O interface and isolated load switch driver IC

    公开(公告)号:US10135439B2

    公开(公告)日:2018-11-20

    申请号:US15492256

    申请日:2017-04-20

    Abstract: Disclosed examples include isolated load switch driver circuits to drive a load, including an impedance circuit that receives a digital input voltage signal from a signal source, and selectively allows a current signal to flow from the signal source to charge a buffer capacitor. An impedance control circuit controls the impedance circuit to limit the current signal in response to the buffer capacitor reaching a first threshold voltage, and an output circuit provides an output isolated from the digital input voltage signal to switch the load. A signaling circuit selectively enables the output circuit to draw power from the buffer capacitor in response to the voltage of the buffer capacitor reaching the first threshold voltage.

    Isolated High Frequency DC/DC Switching Regulator

    公开(公告)号:US20180152109A1

    公开(公告)日:2018-05-31

    申请号:US15363188

    申请日:2016-11-29

    CPC classification number: H02M3/33592 H02M1/08 H02M3/33553 H02M2001/0058

    Abstract: An electronic device, which includes an H-bridge circuit and a miniaturized transformer that is coupled to operate at VHF frequency, and a driver circuit for an n-type power transistor of the H-bridge circuit are disclosed. The driver circuit includes a first p-type transistor and an n-type transistor coupled between an upper rail and a lower rail, with an output taken between the drains of the first p-type transistor and the n-type transistor being coupled to a gate of the n-type power transistor. The driver circuit also includes a sample-and-hold capacitor coupled to capture a drain voltage for the first n-type power transistor on a first edge of a control signal for the first n-type power transistor and a comparator coupled to compare the captured drain voltage to a lower rail on a given edge of a clock signal and to provide a comparator value. The driver circuit also includes an up/down counter, which is coupled to receive the comparator value, to adjust a counter value responsive to receiving the comparator value and to output the counter value, and a first timing circuit that is coupled to receive the counter value and to send an adjustable pulse towards a gate of the first p-type transistor and a gate of the n-type transistor.

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