公开(公告)号：US20190279977A1

公开(公告)日：2019-09-12

申请号：US16035007

申请日：2018-07-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Qingjie Ma ,  Wei Xu ,  Jingwei Xu ,  Yang Wang

IPC: H01L27/02 ,  H03K17/081 ,  H03K17/0812

Abstract: In a described example, an apparatus includes: a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.

公开(公告)号：US10038436B2

公开(公告)日：2018-07-31

申请号：US15347380

申请日：2016-11-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ruochen Zhang ,  Xiaofan Qiu ,  Jingwei Xu ,  Qingjie Ma

IPC: H03K3/00 ,  H03K17/16 ,  H03K19/0175 ,  H03K17/082 ,  H03K17/284

CPC classification number: H03K17/165 ,  H03K17/0822 ,  H03K17/284 ,  H03K19/017509 ,  H03K2217/0027

Abstract: A gate driver IC for driving an NMOS transistor having a drain coupled through a load to a power supply. A gate driver output drives the gate of the NMOS transistor. A comparator receives the drain voltage of the NMOS transistor and compares it to a reference voltage representative of a short circuit condition between the drain and the power supply. The comparator outputs a first value if the drain voltage is greater than the reference voltage and outputs a second value if the drain voltage is less than or equal to the reference voltage. Control circuitry receives the output of the first comparator and pulls the voltage of the gate driver output low if the comparator output is of the first value. Adaptive masking circuitry is operable, upon an application of an “on” signal to the gate driver output, to mask the output of the comparator such that a condition of the drain voltage being greater than the reference voltage does not cause the control circuitry to pull the voltage of the gate driver output low. The adaptive masking circuitry detects a Miller plateau in the gate voltage of the external NMOS transistor. The adaptive masking circuitry stops masking the output of the comparator after the end of the Miller plateau.

公开(公告)号：US11048291B2

公开(公告)日：2021-06-29

申请号：US16218664

申请日：2018-12-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ruochen Zhang ,  Wei Xu ,  Hongyan Wu ,  Qingjie Ma

IPC: G06F1/08 ,  H04J3/06 ,  H03L7/07 ,  H04B7/26

Abstract: A system for a network of one or more off-board subsystems is provided for controlling automobile subsystems such as vehicle lighting. Such a system may be compatible with a universal asynchronous receiver transmitter (UART) interface and it may address timing issues by using a protocol having a synchronization frame (sync frame) such that a clock signal may be recovered from the sync frame sent by an off-board master device 202, such as a microcontroller unit 208, to a satellite/slave 211 device. Such a protocol permits elimination of a crystal clock oscillator and phase-locked loop located at satellite, thereby dispensing with an otherwise significant cost.

公开(公告)号：US20200161293A1

公开(公告)日：2020-05-21

申请号：US16751491

申请日：2020-01-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Qingjie Ma ,  Wei Xu ,  Jingwei Xu ,  Yang Wang

IPC: H01L27/02 ,  H03K17/081 ,  H03K17/0812

Abstract: In a described example, an apparatus includes: a first metal oxide semiconductor field effect transistor (MOSFET) coupled between a first input terminal for receiving a supply voltage and an output terminal for coupling to a load, and having a first gate terminal; an enable terminal coupled to the first gate terminal for receiving an enable signal; a first current mirror coupled between the first input terminal and a first terminal of a first series resistor and having an input coupled to the first gate terminal; and a second MOSFET coupled between the first gate terminal and the output terminal, and having a second gate terminal coupled to the first terminal of the first series resistor, the first series resistor having a second terminal coupled to the output terminal.

公开(公告)号：US10310530B1

公开(公告)日：2019-06-04

申请号：US15963330

申请日：2018-04-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Feng Lu ,  Qingjie Ma

IPC: G05F1/575 ,  G05F3/26 ,  G05F1/46 ,  G05F1/59

CPC classification number: G05F1/575 ,  G05F1/468 ,  G05F1/59

Abstract: A circuit comprises: a pass transistor; a first transistor comprising a gate coupled to the gate of the pass transistor, a source coupled to the source of the pass transistor, and a drain; a second transistor comprising a gate coupled to the gate of the pass transistor, a source coupled to the source of the pass transistor, and a drain; a first current mirror coupled to the drain of the first transistor; a second current mirror coupled to the drain of the second transistor, and coupled to the first current mirror; a feedback voltage circuit coupled to the drain of the pass transistor; an error amplifier comprising a first input port coupled to the feedback voltage circuit, and an output port coupled to the gate of the pass transistor; and a capacitor coupled to the second current mirror and to the first input port of the error amplifier.

公开(公告)号：US10111285B2

公开(公告)日：2018-10-23

申请号：US15587992

申请日：2017-05-05

Applicant: Texas Instruments Incorporated

Inventor： Minwen Shi ,  Ruochen Zhang ,  Qingjie Ma

IPC: H05B37/02 ,  H05B33/08

Abstract: A light emitting diode controller integrated circuit includes counter circuitry having inputs coupled to a clock signal input pin, a pulse width modulated signal input pin, and a sense input pin, and has a count output coupled to a gate drive signal output to an external power transistor. The power transistor is connected in series between a power lead, a sense resistor, and a light emitting diode. The sense input pin is coupled to the series connection between the resistor and the transistor. The counter circuitry provides a Ton_delay equal to a Toff_delay of the power transistor. By counting up during a Ton_delay and down during a Toff_delay, the controller can be used with power transistors of unknown characteristics.

公开(公告)号：US10088856B2

公开(公告)日：2018-10-02

申请号：US15588089

申请日：2017-05-05

Applicant: Texas Instruments Incorporated

Inventor： Alvin Xu ,  Qingjie Ma ,  Yang Wang ,  Yan He ,  Jun Ma ,  Zhenghao Cui ,  Jingwei Xu

IPC: G05F1/56 ,  G05F1/567 ,  G05F3/30

Abstract: Methods, apparatus, systems and articles of manufacture for negative output voltage active clamping using a floating bandgap reference and temperature compensation are disclosed. An example load switch includes a floating bandgap reference circuit to generate a bandgap reference voltage. A resistor divider is to generate a resistor divider voltage. A temperature compensator to apply a temperature compensation current to the resistor divider to create a temperature compensated resistor divider voltage. A power transistor is to be enabled when the temperature compensated resistor divider voltage is less than the bandgap reference voltage. The example load switch can work under negative output voltage clamping and get better accuracy drain to source clamped voltage of power transistor for inductive load condition.