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公开(公告)号：US20230050729A1
公开(公告)日：2023-02-16
申请号：US17401958
申请日：2021-08-13
Applicant: Texas Instruments Incorporated
Inventor： Eric Thierry Jean Peeters , Gary Augustine Cooper , Robin Osa Hoel , Ruchi Shankar , Prachi Mishra
IPC: G06F21/60
Abstract: In described examples, a processor system includes a mailbox, a hardware security functional block (HSFB, also called a trusted agent herein), a processor, and a processor firewall. The HSFB includes a database configured to store at least one software context access rule. The processor executes multiple software contexts. The HSFB approves or denies an access request received from a debugging tool, via the mailbox, in response to the database and a software context identification (ID) included in the access request. The HSFB sends a message to the processor firewall indicating whether the access request is approved. The processor firewall determines whether to pass instructions to the processor for execution with respect to the identified software context in response to the message.
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Patent Agency Ranking
公开(公告)号：US20170068263A1
公开(公告)日：2017-03-09
申请号：US14845579
申请日：2015-09-04
Applicant: Texas Instruments Incorporated
Inventor： Ruchi Shankar , Somshubhra Paul , Gaurang Helekar
Abstract: A system includes a voltage regulator having an output voltage; a power management system, coupled to the voltage regulator, operable to continuously monitor the output voltage to determine whether the output voltage is within a range; and the power management system is operable to set the range to a normal range during normal operation, and is operable to increase the range beyond the normal range during a low power mode and during a wake-up period from a low power mode.
Abstract translation: 系统包括具有输出电压的电压调节器; 电源管理系统，耦合到电压调节器，可操作以连续监视输出电压以确定输出电压是否在一个范围内; 并且电力管理系统可操作以在正常操作期间将范围设置为正常范围，并且可操作以在低功率模式期间以及在从低功率模式的唤醒期间增加超出正常范围的范围。
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公开(公告)号：US12228954B2
公开(公告)日：2025-02-18
申请号：US17064480
申请日：2020-10-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Ruchi Shankar , Somshubhra Paul , Gaurang Helekar
Abstract: A system includes a voltage regulator having an output voltage and a power management system, coupled to the voltage regulator. The power management system operable to determine whether the output voltage is within an active range, set the active range to a first range during a first time, or during a first mode, and set the active range to a second range for a second time, or during a second mode.
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公开(公告)号：US12204407B2
公开(公告)日：2025-01-21
申请号：US17557747
申请日：2021-12-21
Applicant: Texas Instruments Incorporated
Inventor： Ruchi Shankar , Tejas Dhanajirao Salunkhe , Trevor Charles Jones
IPC: G06F11/10 , G06F11/00 , G06F11/07 , G06F12/08 , G06F12/0811
Abstract: In described examples, a memory system is accessed by reading a data line and error detection bits for the data line from a first memory. The data line and the error detection bits from the first memory are decoded to determine if an error is present in the data line from the first memory. A copy of the data line and the error detection bits are stored in a second memory. The copy of the data line and error detection bits are read from the second memory. The copy of the data line and error detection bits are decoded to determine if an error is present in the copy of the data line from the second memory.
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公开(公告)号：US12046275B2
公开(公告)日：2024-07-23
申请号：US17558176
申请日：2021-12-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Ruchi Shankar , Shobhit Singhal , Sverre Brubæk , Praveen Kumar Narayanan
IPC: G06F9/445 , G11C11/412 , G11C11/419 , G11C11/418
CPC classification number: G11C11/412 , G11C11/419 , G11C11/418
Abstract: A static random-access memory (SRAM) includes a SRAM cell module, comprising a plurality of SRAM cell partitions, and an initialization register, containing data configured to control initialization of at least some of the plurality of partitions during an initialization phase. The SRAM also includes a control module coupled with the SRAM cell module and the initialization register, configured to read the initialization register during the initialization phase, and to selectively initialize a portion of the plurality of SRAM cell partitions, based at least in part on the data contained within the initialization register.
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公开(公告)号：US10795391B2
公开(公告)日：2020-10-06
申请号：US14845579
申请日：2015-09-04
Applicant: Texas Instruments Incorporated
Inventor： Ruchi Shankar , Somshubhra Paul , Gaurang Helekar
Abstract: A system includes a voltage regulator having an output voltage; a power management system, coupled to the voltage regulator, operable to continuously monitor the output voltage to determine whether the output voltage is within a range; and the power management system is operable to set the range to a normal range during normal operation, and is operable to increase the range beyond the normal range during a low power mode and during a wake-up period from a low power mode.
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