公开(公告)号：US20160327869A1

公开(公告)日：2016-11-10

申请号：US15109917

申请日：2015-01-13

Applicant: TOKYO ELECTRON LIMITED

Inventor： Seiji NAGAHARA ,  Gousuke SHIRAISHI ,  Satoru SHIMURA ,  Kousuke YOSHIHARA ,  Shinichiro KAWAKAMI ,  Masaru TOMONO ,  Yuichi TERASHITA ,  Hironori MIZOGUCHI

IPC: G03F7/20

CPC classification number: G03F7/7055 ,  G03F7/2022 ,  G03F7/70558

Abstract: A technique which, in forming a resist pattern on a wafer, can achieve high resolution and high in-plane uniformity of pattern line width. After forming a resist film on a wafer W and subsequently performing pattern exposure by means of a pattern exposure apparatus, the entire pattern exposure area is exposed by using a flood exposure apparatus. During the flood exposure, the exposure amount is adjusted depending on the exposure position on the wafer based on information on the in-plane distribution of the line width of a resist pattern, previously obtained from an inspection apparatus. Methods for adjusting the exposure amount include a method which adjusts the exposure amount while moving a strip-shaped irradiation area corresponding to the diameter of the wafer, a method which involves intermittently moving an irradiation area, corresponding to a shot area in the preceding pattern exposure, to adjust the exposure amount for each chip.

Abstract translation: 在晶片上形成抗蚀剂图案的技术可以实现图案线宽度的高分辨率和高平面均匀性。 在晶片W上形成抗蚀剂膜，然后通过图案曝光装置进行图案曝光，通过使用淹光曝光装置曝光整个图案曝光区域。 在曝光期间，根据先前从检查装置获得的抗蚀剂图案的线宽的面内分布的信息，根据晶片上的曝光位置来调节曝光量。 用于调节曝光量的方法包括在移动对应于晶片直径的条形照射区域的同时调节曝光量的方法，涉及间歇地移动照射区域的方法，对应于先前图案曝光中的照射区域 ，调整每个芯片的曝光量。