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公开(公告)号:US20210119010A1
公开(公告)日:2021-04-22
申请号:US16656014
申请日:2019-10-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Sai-Hooi YEONG , Chien-Ning YAO , Chi-On CHUI
Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a first source/drain structure and a second source/drain structure in the substrate. The semiconductor device structure includes a gate stack over the substrate and between the first source/drain structure and the second source/drain structure. The gate stack includes a gate dielectric layer and a gate over the gate dielectric layer, a portion of the gate dielectric layer is adjacent to a first sidewall of the gate, the gate stack has a gap between the first sidewall and the portion of the gate dielectric layer, and the gap is a vacuum gap or an air gap.
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12.
公开(公告)号:US20200381559A1
公开(公告)日:2020-12-03
申请号:US16427078
申请日:2019-05-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Bo-Feng YOUNG , Chih-Yu CHANG , Sai-Hooi YEONG , Chi-On CHUI , Chih-Hao WANG
Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a fin structure that includes a negative capacitance (NC) material. The semiconductor device structure also includes a gate electrode layer, a gate dielectric structure, a source feature, and a drain feature. The gate dielectric structure covers the top surface and the opposing sidewall surfaces of the fin structure. The gate electrode layer is formed over the gate dielectric structure. The source feature and the drain feature are formed in and protrude from the fin structure, and separated from each other by the gate electrode layer.
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公开(公告)号:US20190148519A1
公开(公告)日:2019-05-16
申请号:US15875485
申请日:2018-01-19
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Kai-Hsuan LEE , Bo-Yu LAI , Chi-On CHUI , Cheng-Yu YANG , Yen-Ting CHEN , Sai-Hooi YEONG , Feng-Cheng YANG , Yen-Ming CHEN
IPC: H01L29/66 , H01L29/78 , H01L29/08 , H01L29/417 , H01L21/306 , H01L21/762
Abstract: A semiconductor device and a method for forming the same are provided. The method includes forming a gate structure over a fin structure. The method further includes forming first gate spacers on opposite sidewalls of the gate structure. The method further includes forming source/drain features in the fin structure and adjacent to the first gate spacers. The method further includes performing a surface treatment process on top surfaces of the source/drain features and outer sidewalls of the first gate spacers. The method further includes depositing a contact etch stop layer (CESL) over the source/drain features and the first gate spacers. A first portion of the CESL is deposited over the top surfaces of the source/drain features at a first deposition rate. A second portion of the CESL is deposited over the outer sidewalls of the first gate spacers at a second deposition rate.
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