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公开(公告)号：US07616427B2
公开(公告)日：2009-11-10
申请号：US11751218
申请日：2007-05-21
IPC分类号： H01G4/06
摘要： A monolithic ceramic capacitor includes a first same-polarity-electrode-connecting conductor and a second same-polarity-electrode-connecting conductor that are provided inside a ceramic laminate. The first same-polarity-electrode-connecting conductor is electrically connected to all of the first outer electrodes, and the second same-polarity-electrode-connecting conductor is electrically connected to all of the second outer electrodes. Preferably, a plurality of first same-polarity-electrode-connecting conductors and a plurality of second same-polarity-electrode-connecting conductors are successively disposed in the laminating direction inside the ceramic laminate.
摘要翻译： 一种叠层陶瓷电容器包括设置在陶瓷层压板内部的第一相同极性 - 电极连接导体和第二相同极性 - 电极连接导体。 第一相同极性 - 电极连接导体与所有第一外部电极电连接，并且第二相同极性 - 电极连接导体电连接到所有第二外部电极。 优选地，多个第一同极性电极连接导体和多个第二相同极性电极连接导体在层叠方向内依次设置在陶瓷层叠体内。
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公开(公告)号：US07508647B2
公开(公告)日：2009-03-24
申请号：US12120870
申请日：2008-05-15
IPC分类号： H01G4/228
摘要： In a multilayer capacitor including a capacitor body, first capacitor portions and a second capacitor portion are arranged in the direction of lamination. While a resonant frequency of the first capacitor portions is set to be greater than a resonant frequency of the second capacitor portion so that the first capacitor portions contribute to low ESL, an ESR per layer of the second capacitor portion is set to be greater than an ESR per layer of the first capacitor portions so that the second capacitor portion contributes to high ESR. Furthermore, a combined ESR of the first capacitor portions is set to be less than or greater than a combined ESR of the second capacitor portion.
摘要翻译： 在包括电容器本体的层叠电容器中，沿层叠方向布置第一电容器部分和第二电容器部分。 当第一电容器部分的谐振频率被设定为大于第二电容器部分的谐振频率，使得第一电容器部分有助于低ESL时，每层第二电容器部分的ESR被设置为大于 ESR，使得第二电容器部分有助于高ESR。 此外，第一电容器部分的组合ESR被设置为小于或大于第二电容器部分的组合ESR。
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公开(公告)号：US07303408B2
公开(公告)日：2007-12-04
申请号：US11183710
申请日：2005-07-18
申请人： Yoshikazu Takagi
发明人： Yoshikazu Takagi
IPC分类号： H01R12/00
CPC分类号： H01R12/724 , H05K3/306
摘要： A connector with a locator, which prevents cracks at solder connected portions between pin contacts and a circuit board, prevents noise even in use in an environment with vibrations, and prevents deformation of the pin contacts is provided. The connector includes a plurality of pin contacts, a housing that houses and retains the rear ends of the pin contacts while leading out the front ends of the pin contacts in the same direction, and a resin-made plate-shaped locator that is attached to the housing and has a plurality of insertion holes for inserting the pin contacts to regulate the leading-out directions of the front ends of the pin contacts, wherein the locator is attached in contact with the housing side surface while its side end surface is in a warped condition.
摘要翻译： 具有定位器的连接器，其防止在针触点和电路板之间的焊接连接部分处的裂纹，甚至在具有振动的环境中使用时防止噪声，并且防止引脚触点的变形。 连接器包括多个销触点，一个壳体，其容纳并保持销触头的后端，同时沿相同方向引出销触头的前端;以及树脂制板状定位器，其附接到 所述壳体具有用于插入所述销触点的多个插入孔，以调节所述销触头的前端的引出方向，其中所述定位器与所述壳体侧表面接触，而其侧端面处于 翘曲状态
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14.发明授权Connector, method for manufacturing the same, and wiring board structure employing it 失效连接器，其制造方法以及使用它的接线板结构公开(公告)号：US07303402B2
公开(公告)日：2007-12-04
申请号：US10520162
申请日：2003-07-04
申请人： Yoshikazu Takagi
发明人： Yoshikazu Takagi
IPC分类号： H01R12/00
CPC分类号： H05K3/365 , H05K3/305 , H05K2201/0133 , H05K2201/0367 , H05K2201/10393 , H05K2201/209
摘要： The invention relates to a connector for interconnecting an plurality of wiring boards, a method for manufacturing the same, and a wiring board structure employing the connector. The connector has a base member having no conductivity and a conductive wire provided on a surface of the base member, and is arranged so as to be connectable to a wiring board, comprising: a conductive pressing member provided on and protruding from the wire; and a holding member provided on and protruding from a portion in the surface of the base member except where the pressing member is located, the holding member having an affixing surface attachable to the wiring board. The invention can make the wire provided on a surface of the wiring board flat, and therefore it becomes possible to secure the flexibility in designing a wiring pattern of a wiring board.
摘要翻译： 本发明涉及一种用于互连多个布线板的连接器，其制造方法以及采用该连接器的布线板结构。 连接器具有不具有导电性的基座构件和设置在基座构件的表面上的导线，并且布置成可连接到布线板，包括：导电按压构件，设置在导线上并从导线突出; 以及保持构件，所述保持构件设置在所述基座构件的除了所述按压构件所在的表面之外的部分的突出部上，所述保持构件具有可附接到所述布线板的固定表面。 本发明可以使布线板的表面上设置的布线平坦，从而可以确保设计布线板的布线图案的灵活性。
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15.发明申请Paper sheet identifying and counting machine and method for identifying and counting paper sheet 审中-公开纸张识别和计数机以及识别和计数纸张的方法公开(公告)号：US20050053183A1
公开(公告)日：2005-03-10
申请号：US10497157
申请日：2002-12-05
CPC分类号： B65H5/062 , B65H2404/1531 , B65H2404/612 , G07D7/121 , G07D7/16 , G07D11/14 , G07D11/50
摘要： A sheet discriminating/counting machine selects sheets to be discriminated of a predetermined country or region by discrimination object selecting means, transports the sheets to be discriminated at high speed along a transporting path, and performs sheet discriminating/counting processing at a sheet discriminating/counting unit disposed along the transporting path. The sheet discriminating/counting machine comprises: a hopper to which sheets to be discriminated are supplied; a sheet transporting device for transporting sheets supplied to the hopper one by one along a transporting path with the shorter side of each sheet parallel to the transporting direction; a sheet discriminating unit disposed along the transporting path for discriminating/counting sheets; and a stacker upon which sheets fed out from the transporting path are stacked. The transporting path is provided with a curved transporting region which is curved in a U-shape partway and has a reject transport path connected to a pocket from a the subsequent downstream side transporting path. The sheet discriminating/counting machine performs discrimination processing of 1200 sheets or more per minute and has one stacker and one pocket.
摘要翻译： 纸张识别/计数机通过识别对象选择装置选择要被识别的预定国家或地区的纸张，沿着传送路径高速传送要被区别的纸张，并在纸张识别/计数中进行纸张识别/计数处理 单元沿着传送路径设置。 片材鉴别/计数机包括：供给要被鉴别的片材的料斗; 一个纸张传送装置，用于沿着输送路径一个一个地输送供给到料斗的纸张，每个纸张的短边平行于输送方向; 沿着传送路径设置的用于识别/计数纸张的纸张识别单元; 以及堆叠器，堆叠从输送路径送出的纸张。 输送路径具有弯曲的输送区域，该输送区域在U形中途弯曲，并且具有从后续的下游侧输送路径连接到口袋的拒收输送路径。 纸张识别/计数机进行每分钟1200张以上的识别处理，具有一个堆垛机和一个袋。
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公开(公告)号：US06377439B1
公开(公告)日：2002-04-23
申请号：US09615651
申请日：2000-07-13
IPC分类号： H01G4005
CPC分类号： H01G4/005 , H01G4/30 , Y10T428/24926
摘要： An electronic multilayer ceramic component is disclosed which is less susceptible to having a crack or delamination in a sintered ceramic block and has high thermal shock resistance, high humidity resistance, and high reliability. Dimensional parameters EW, WG, T, and G of the electronic multilayer ceramic component are determined such that the following conditions are satisfied: WG/EW≧0.3; and T/G≦7.0, where EW is the width of inner electrodes, WG is the width of a side gap region between the ends of the inner electrodes and one of side faces of a sintered ceramic block, T is the thickness of a region in which the plurality of inner electrodes are laminated, and G is the thickness of one of the outermost ceramic layers parallel to the plurality of inner electrodes and located outside the region in which the plurality of inner electrodes are laminated.
摘要翻译： 公开了一种电子多层陶瓷组件，其不太可能在烧结陶瓷块中具有裂纹或分层，并且具有高耐热冲击性，高耐湿性和高可靠性。 确定电子多层陶瓷部件的尺寸参数EW，WG，T和G，使得满足以下条件：WG / EW> = 0.3; 和T / G <= 7.0，其中EW是内部电极的宽度，WG是内部电极的端部与烧结陶瓷块的一个侧面之间的侧面间隙区域的宽度，T是 多个内部电极层叠的区域，G是与多个内部电极平行且位于多个内部电极层叠的区域外的最外层陶瓷层之一的厚度。
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公开(公告)号：US6014309A
公开(公告)日：2000-01-11
申请号：US75668
申请日：1998-05-11
申请人： Yasushi Ueno , Yoshikazu Takagi , Kazuaki Kawabata , Nagato Omori
发明人： Yasushi Ueno , Yoshikazu Takagi , Kazuaki Kawabata , Nagato Omori
CPC分类号： H01G4/30
摘要： There is provided a highly reliable laminated ceramic electronic part in which delamination or crack can be suppressed from occurring during a sintering process even if a number of lamination of internal electrodes is increased and a thickness of the ceramic layer is reduced and which excels in thermal shock resistance. The laminated ceramic electronic part is constructed so as to satisfy the following requirements of that a thickness of the ceramic layer is 10 .mu.m or less; a number of lamination of the internal electrodes is 200 or more; a ratio of a thickness of the internal electrode to the thickness of the ceramic layer (thickness of internal electrode/thickness of ceramic layer) is 0.10 to 0.40; and a ratio of a volume of the internal electrode to a volume of the ceramic element (volume of internal electrodes/volume of ceramic element) is 0.10 to 0.30.
摘要翻译： 提供了一种高度可靠的层叠陶瓷电子部件，其中即使内部电极的层压增加并且陶瓷层的厚度减小并且热冲击优异，也可以在烧结过程中抑制分层或裂纹发生 抵抗性。 层叠陶瓷电子部件的结构要满足陶瓷层的厚度为10μm以下的要求。 内部电极的层叠数为200个以上; 内部电极的厚度与陶瓷层的厚度的比例（内部电极的厚度/陶瓷层的厚度）为0.10〜0.40; 并且内部电极的体积与陶瓷元件的体积（内部电极的体积/陶瓷元件的体积）的比率为0.10〜0.30。
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18.发明授权Multilayer capacitor having low equivalent series inductance and controlled equivalent series resistance 有权具有低等效串联电感和受控等效串联电阻的多层电容器公开(公告)号：US08649156B2
公开(公告)日：2014-02-11
申请号：US13349608
申请日：2012-01-13
摘要： In a capacitor body of a multilayer capacitor, one second capacitor portion is sandwiched between two first capacitor portions. An ESR is controlled by setting a width of lead portions of third and fourth internal electrodes disposed in the second capacitor portion to be less than that of lead portions of first and second internal electrodes disposed in the first capacitor portions and by changing ratios between the first and second capacitor portions in the width of the lead portions and in the number of stacked internal electrodes. In the first capacitor portions, current paths from the internal electrodes to an external terminal electrode are widely distributed so that the first capacitor portions have a relatively low ESL, and accordingly, the ESL of the entire multilayer capacitor is reduced.
摘要翻译： 在层叠电容器的电容器体中，一个第二电容器部分夹在两个第一电容器部分之间。 通过将布置在第二电容器部分中的第三和第四内部电极的引线部分的宽度设置为小于设置在第一电容器部分中的第一和第二内部电极的引线部分的宽度，并且通过改变第一 以及在引线部分的宽度和堆叠的内部电极的数量中的第二电容器部分。 在第一电容器部分中，从内部电极到外部端子电极的电流路径广泛分布，使得第一电容器部分具有相对较低的ESL，因此整个层叠电容器的ESL减小。
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公开(公告)号：US08315033B2
公开(公告)日：2012-11-20
申请号：US12623574
申请日：2009-11-23
摘要： In a capacitor body, a single second capacitor unit is interposed between two first capacitor units. The width direction dimension of each of extended portions of first and second internal electrodes included in the first capacitor unit is larger than the width direction dimension of each of extended portions of third and fourth internal electrodes included in the second capacitor unit. The area of each of the respective portions of a first opposed portion of the first internal electrode and a second opposed portion of the second internal electrode, the respective portions being opposed to each other, is smaller than the area of each of respective portions of opposed portions of the third and fourth internal electrodes, the respective portions being opposed to each other. Thus, a multilayer capacitor has a characteristic that is a combination of a low-ESL characteristic of the first capacitor unit and a high-ESR characteristic of the second capacitor.
摘要翻译： 在电容器本体中，单个第二电容器单元插入在两个第一电容器单元之间。 包括在第一电容器单元中的第一和第二内部电极的每个延伸部分的宽度方向尺寸大于包括在第二电容器单元中的第三和第四内部电极的每个延伸部分的宽度方向尺寸。 第一内部电极的第一相对部分的每个部分的面积和第二内部电极的彼此相对的部分的相对部分的面积小于相对的每个部分的面积 第三和第四内部电极的各部分彼此相对。 因此，层叠电容器具有作为第一电容器单元的低ESL特性和第二电容器的高ESR特性的组合的特性。
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公开(公告)号：US20110189704A1
公开(公告)日：2011-08-04
申请号：US12674410
申请日：2008-08-22
申请人： Yoshikazu Takagi , Yuichi Shintani
发明人： Yoshikazu Takagi , Yuichi Shintani
IPC分类号： G01N33/53 , C07K17/10 , C07K17/02 , G01N33/566
CPC分类号： G01N33/54393 , G01N33/5306
摘要： Disclosed is a non-specific reaction inhibitor for use in an immunological measurement, comprising a complex of an antibody or a fragment of the antibody capable of specifically binding to a non-specific reaction factor, and a polymer. The non-specific reaction inhibitor can inhibit a non-specific reaction which may interfere with the accurate detection or quantification of a trace substance in an immunological measurement method.
摘要翻译： 公开了一种用于免疫测定的非特异性反应抑制剂，其包含能够特异性结合非特异性反应因子的抗体或抗体片段的复合物和聚合物。 非特异性反应抑制剂可以抑制可能干扰免疫测定方法中微量物质的精确检测或定量的非特异性反应。
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