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公开(公告)号:US11043596B2
公开(公告)日:2021-06-22
申请号:US16451018
申请日:2019-06-25
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Shih-Wei Su , Hao-Hsuan Chang , Chih-Wei Chang , Chi-Hsuan Cheng , Ting-An Chien , Bin-Siang Tsai
IPC: H01L21/762 , H01L29/66 , H01L29/78 , H01L21/768
Abstract: A method for forming a semiconductor device is disclosed. A substrate having at least two fins thereon and an isolation trench between the at least two fins is provided. A liner layer is then deposited on the substrate. The liner layer conformally covers the two fins and interior surface of the isolation trench. A stress-buffer film is then deposited on the liner layer. The stress-buffer film completely fills a lower portion that is located at least below half of a trench depth of the isolation trench. A trench-fill oxide layer is then deposited to completely fill an upper portion of the isolation trench.
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公开(公告)号:US10217866B2
公开(公告)日:2019-02-26
申请号:US15696201
申请日:2017-09-06
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Chi-Hsuan Cheng , Cheng-Pu Chiu , Yu-Chih Su , Chih-Yi Wang , Chin-Yang Hsieh , Tien-Shan Hsu , Yao-Jhan Wang
IPC: H01L29/78 , H01L29/06 , H01L27/092 , H01L21/8238 , H01L21/82
Abstract: A semiconductor device and a method of forming the same, the semiconductor device includes a first and a second fin structures, a first, a second and a third isolation structures, and a first and a second gate structures. The first and second fin structures are disposed in a substrate. The first isolation structure is disposed in the substrate and surrounds the first and second fin structures. The second isolation structure is disposed in the first fin structure, and a top surface of the second isolation structure is leveled with a top surface of the first and second fin structures. The third isolation structure is disposed in the second fin shaped structure, and a top surface of the third isolation structure is lower than the top surface of the first and second fin structures. The first and second gate structures are disposed on the second and third isolation structures, respectively.
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公开(公告)号:US20190043760A1
公开(公告)日:2019-02-07
申请号:US16132460
申请日:2018-09-16
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Te-Chang Hsu , An-Chi Liu , Nan-Yuan Huang , Yu-Chih Su , Cheng-Pu Chiu , Tien-Shan Hsu , Chih-Yi Wang , Chi-Hsuan Cheng
IPC: H01L21/8234 , H01L21/308 , H01L21/762
Abstract: A semiconductor structure includes a substrate, a plurality of fin shaped structures, a trench, and a first bump. The substrate has a base, and the fin shaped structures protrude from the base. The trench is recessed from the base of the substrate. The first bump is disposed within the trench and protrudes from a bottom surface of the trench. A width of the first bump is larger than a width of each of the fin shaped structures.
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