公开(公告)号：US11670549B2

公开(公告)日：2023-06-06

申请号：US17125917

申请日：2020-12-17

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Dzafir Bin Mohd Shariff ,  Enrique Jr Sarile ,  Seung Geun Park

IPC: H01L21/78 ,  H01L23/544 ,  H01L21/768

CPC classification number: H01L21/78 ,  H01L21/76838 ,  H01L23/544

Abstract: A semiconductor package which is free of metal debris from backside metallization (BSM) is disclosed. The semiconductor package is singulated by performing a saw street open process from the frontside of the wafer and then includes a singulation process using a plasma etch from the backside of the wafer with BSM. The singulation process results in metal debris free packages.

公开(公告)号：US20230154796A1

公开(公告)日：2023-05-18

申请号：US18056726

申请日：2022-11-18

Applicant: UTAC Headquarters Pte. Ltd.

Inventor： Dzafir Bin Mohd Shariff ,  Enrique E. Sarile, JR. ,  Jackson Fernandez Rosario ,  Ronnie M. De Villa ,  Chan Loong Neo

IPC: H01L21/78 ,  H01L23/31

CPC classification number: H01L21/78 ,  H01L23/3171

Abstract: Reliable plasma dicing of wafers to singulate it into individual dies is disclosed. Laser processing is employed to form mask openings in a passivation stack of a processed wafer. The patterned passivation stack serves as a plasma dicing mask for plasma dicing the wafer. The sidewalls of the mask openings may be flat or vertical sidewalls. In other cases, the sidewalls of the mask openings are slanted or chamfered sidewalls. The plasma dices the wafer using first and second plasma etch steps. The first plasma etch step etches to form scalloped sidewalls on the first portion of the die and the second plasma step etches to form flat or vertical sidewalls on a second portion of the die. The second portion of the die is the lower portion of the substrate or wafer. This prevents backside notching to improve reliability.