公开(公告)号：US20140091279A1

公开(公告)日：2014-04-03

申请号：US13630808

申请日：2012-09-28

申请人： Jessica S. Kachian ,  Willy Rachmady ,  Robert B. Turkot, Jr.

发明人： Jessica S. Kachian ,  Willy Rachmady ,  Robert B. Turkot, Jr.

IPC分类号： H01L29/775 ,  H01L21/20 ,  B82Y40/00

CPC分类号： H01L29/775 ,  B82Y10/00 ,  B82Y40/00 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/78696

摘要： Non-planar semiconductor devices having germanium-based active regions with release etch-passivation surfaces are described. For example, a semiconductor device includes a vertical arrangement of a plurality of germanium-rich nanowires disposed above a substrate. Each nanowire includes a channel region having a sulfur-passivated outer surface. A gate stack is disposed on and completely surrounds the channel region of each of the germanium-rich nanowires. The gate stack includes a gate dielectric layer disposed on and surrounding the sulfur-passivated outer surface and a gate electrode disposed on the gate dielectric layer. Source and drain regions are disposed on either side of the channel regions of the germanium-rich nanowires.

摘要翻译： 描述了具有剥离蚀刻钝化表面的锗基活性区的非平面半导体器件。 例如，半导体器件包括布置在衬底上方的多个富含富锗的纳米线的垂直布置。 每个纳米线包括具有硫钝化外表面的通道区域。 栅堆叠设置在每个富含锗的纳米线的沟道区上并完全包围。 栅极堆叠包括设置在硫钝化的外表面上并围绕其的环境的栅极电介质层和设置在栅极介电层上的栅电极。 源极和漏极区域设置在富锗纳米线的沟道区域的两侧。