Flatness detector
    12.
    发明授权
    Flatness detector 失效
    平面度检测器

    公开(公告)号:US5379631A

    公开(公告)日:1995-01-10

    申请号:US029571

    申请日:1993-03-11

    CPC分类号: B21B38/02 G01L5/045

    摘要: A flatness detector has a fixed shaft and a plurality of rotary rings loosely fitted over the shaft and adjacent to each other along an axis of the shaft, a pneumatic bearing being defined by a gap between the rings and the shaft. The shaft is provided with heating means for heating the shaft to prevent shrinkage of a rolled strip due to temperature variations of the strip as well as bending means at opposite ends of the shaft for bending the shaft in a predetermined direction so as to prevent formation of lengthwise wrinkles on the rolled strip.

    摘要翻译: 平面度检测器具有固定轴和多个旋转环,其松动地装配在轴上并且沿着轴的轴线彼此相邻,气动轴承由环和轴之间的间隙限定。 轴设置有用于加热轴的加热装置,以防止由于条的温度变化导致的轧制带的收缩以及在轴的相对端处的弯曲装置,用于沿预定方向弯曲轴,以防止形成 在轧制带上的纵向褶皱。

    Non-volatile memory control device
    13.
    发明授权
    Non-volatile memory control device 有权
    非易失性存储器控制装置

    公开(公告)号:US07808837B2

    公开(公告)日:2010-10-05

    申请号:US12182782

    申请日:2008-07-30

    申请人: Kenji Misumi

    发明人: Kenji Misumi

    IPC分类号: G11C11/34 G11C16/04 G11C7/00

    CPC分类号: G06F13/16 G11C16/10

    摘要: A memory controller outputs an additional writing instruction to one of a plurality of non-volatile memories arbitrarily selected via a writing instruction output unit when a signal which rejects a writing operation is not outputted from writing controllers of the plurality of non-volatile memories for a certain period of time, and outputs a temporary writing instruction to another non-volatile memory at least once via the writing instruction output unit by the time when the additional writing operation is completed in the arbitrary non-volatile memory.

    摘要翻译: 当禁止写入操作的信号不从多个非易失性存储器的写入控制器输出时,存储器控制器向经由写入指令输出单元任意选择的多个非易失性存储器之一输出附加写入指令, 并且在任意非易失性存储器中的附加写入操作完成时,经由写入指令输出单元至少一次向另一个非易失性存储器输出临时写入指令。

    Nonvolatile semiconductor memory device and programming or erasing method therefor
    14.
    发明授权
    Nonvolatile semiconductor memory device and programming or erasing method therefor 有权
    非易失性半导体存储器件及其编程或擦除方法

    公开(公告)号:US07460410B2

    公开(公告)日:2008-12-02

    申请号:US11502430

    申请日:2006-08-11

    IPC分类号: G11C16/00

    CPC分类号: G11C16/349

    摘要: In a nonvolatile memory cell having a trap layer, programming or erasing is made in a sequence of first charge injection with a given wait time being secured and second charge injection executed after the first charge injection. Surrounding charge that deteriorates the data retention characteristic is reduced by use of initial variation occurring immediately after programming (charge loss phenomenon due to binding of injected charge with the surrounding charge in an extremely short time), and then the charge loss due to the initial variation is compensated, to thereby improve the data retention characteristic.

    摘要翻译: 在具有陷阱层的非易失性存储单元中,按照第一次电荷注入的顺序进行编程或擦除,同时确保给定的等待时间,并且在第一次电荷注入之后执行第二次电荷注入。 通过使用编程后立即发生的初始变化(由于注入的电荷与周围电荷的结合在极短的时间内导致的电荷损失现象),从而降低数据保持特性的周围电荷,然后由于初始变化引起的电荷损失 被补偿,从而提高数据保持特性。

    Non-volatile memory device with threshold voltage control function
    15.
    发明申请
    Non-volatile memory device with threshold voltage control function 有权
    具有阈值电压控制功能的非易失性存储器件

    公开(公告)号:US20060221681A1

    公开(公告)日:2006-10-05

    申请号:US11377433

    申请日:2006-03-17

    IPC分类号: G11C16/04

    CPC分类号: G11C16/102 G11C16/30

    摘要: Even when the number of rewrite operations varies among erase unit areas, the number of rewrite operations is improved for all of the erase unit areas. A flash EEPROM 100 comprises a trimming value storing area 130 of storing a trimming value corresponding to each erase unit area 120 included in a memory cell array 110. When an erase operation and a write operation are performed with respect to a certain erase unit area 120, a regulator circuit 150 converts a voltage boosted by a booster circuit 140 to a level corresponding to the trimming value for the erase unit area 120. When a read determination circuit 170 detects an abnormality as the number of rewrite operations is increased, the trimming value is updated to a value which causes the regulator circuit 150 to increase the output voltage.

    摘要翻译: 即使重写操作的数量在擦除单元区域之间变化,对于所有的擦除单元区域也改善了重写操作的数量。 闪存EEPROM 100包括修整值存储区域130,其存储对应于包括在存储单元阵列110中的每个擦除单元区域120的修整值。 当相对于某个擦除单元区域120执行擦除操作和写入操作时,调节器电路150将由升压电路140升压的电压转换为与擦除单元区域120的修整值相对应的电平。 当读取确定电路170随着重写操作数量的增加而检测到异常时,修整值被更新为使调节器电路150增加输出电压的值。