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公开(公告)号:US11632107B1
公开(公告)日:2023-04-18
申请号:US17492180
申请日:2021-10-01
Applicant: pSemi Corporation
Inventor: Ravindranath D. Shrivastava , Alper Genc
IPC: H03K17/16 , H03K17/041 , H03K17/0412 , H03K17/693 , H04B1/44 , H03K17/687 , H03K17/06 , H01L27/06
Abstract: A FET switch stack has a stacked arrangement of FET switches, a gate resistor network with ladder resistors and common gate resistors, and a gate resistor bypass arrangement. The bypass arrangement has a first set of bypass switches connected across the gate resistors and a second set of bypass switches connected across the ladder resistors. Bypass occurs during at least a portion of the transition state of the stacked arrangement of FET switches.
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公开(公告)号:US11329642B1
公开(公告)日:2022-05-10
申请号:US17202003
申请日:2021-03-15
Applicant: pSemi Corporation
Inventor: Ravindranath D. Shrivastava , Simon Willard , Peter Bacon
IPC: H03K17/687 , H03K17/0412
Abstract: Methods and devices to improve the switching speed of radio frequency FET switch stacks are disclosed. The described methods and devices are based on bypassing drain-sources resistors when the FET switch stack is transitioning from an ON to an OFF state. Several implementations of the disclosed teachings are also presented.
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公开(公告)号:US10291208B1
公开(公告)日:2019-05-14
申请号:US16030567
申请日:2018-07-09
Applicant: pSemi Corporation
Inventor: Ravindranath D. Shrivastava , Raul Inocencio Alidio
Abstract: A method and apparatus for adjusting the slope of insertion loss of digital step attenuator (DSA). The DSA is implemented on an integrated circuit. The DSA has two series inductances that are introduced between the input of DSA cell and a resistor in the cell, and the output of DSA cell and another resistor in the cell. In one embodiment, adjustment in the value of the series inductances is as achieved by altering the locations of the input port and the output ports. In another embodiment, adjustment in the value of the inductances is achieved by tailoring the length and width of the conductor trace used to connect the input and output ports to the series resistors. The adjustment in the values of the inductances provides a means by which the roll-off of the insertion loss as a function of frequency in the attenuation state can be controlled.
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