公开(公告)号：US12069303B2

公开(公告)日：2024-08-20

申请号：US18242846

申请日：2023-09-06

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Han Boon Teo ,  Takahiro Nishi ,  Tadamasa Toma ,  Ru Ling Liao ,  Sughosh Pavan Shashidhar ,  Hai Wei Sun

IPC: H04N19/597 ,  G06T5/80 ,  H04N5/00 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46 ,  H04N19/85

CPC classification number: H04N19/597 ,  G06T5/80 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46 ,  H04N19/85

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.

公开(公告)号：US12063358B2

公开(公告)日：2024-08-13

申请号：US18196763

申请日：2023-05-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/182

CPC classification number: H04N19/105 ,  H04N19/176 ,  H04N19/182

Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry, in operation: derives, as a first parameter, a total sum of absolute values of sums of horizontal gradient values respectively for pairs of relative pixel positions; derives, as a second parameter, a total sum of absolute values of sums of vertical gradient values respectively for the pairs of relative pixel positions; derives, as a third parameter, a total sum of horizontal-related pixel difference values respectively for the pairs of relative pixel positions; derives, as a fourth parameter, a total sum of vertical-related pixel difference values respectively for the pairs of relative pixel positions; derives, as a fifth parameter, a total sum of vertical-related sums of horizontal gradient values respectively for the pairs of relative pixel positions; and generates a prediction image to be used to encode the current block using the first, second, third, fourth, and fifth parameters.

公开(公告)号：US20240259522A1

公开(公告)日：2024-08-01

申请号：US18629174

申请日：2024-04-08

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Han Boon Teo ,  Chong Soon Lim ,  Jingying Gao ,  Praveen Kumar Yadav ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N7/01 ,  H04N19/184 ,  H04N19/70

CPC classification number: H04N7/013 ,  H04N19/184 ,  H04N19/70

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes a video into a bitstream, the video is specified to be outputted at a first speed different from an original speed of the video, and in encoding the video, the circuitry encodes, into the bitstream, original speed information related to a second speed that is the original speed of the video.

公开(公告)号：US12047587B2

公开(公告)日：2024-07-23

申请号：US18135997

申请日：2023-04-18

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh

IPC: H04N19/159 ,  H04N19/105 ,  H04N19/176 ,  H04N19/186 ,  H04N19/583

CPC classification number: H04N19/159 ,  H04N19/105 ,  H04N19/176 ,  H04N19/186 ,  H04N19/583

Abstract: An encoder includes memory, and circuitry accessible to the memory. The circuitry accessible to the memory: determines whether OBMC is applicable to generation of a prediction image of a current block, according to whether BIO is to be applied to the generation of the prediction image of the current block; when BIO is to be applied to the generation of the prediction image of the current block, determines that OBMC is not applicable to the generation of the prediction image of the current block, and applies BIO to the generation of the prediction image of the current block without applying OBMC.

公开(公告)号：US20240214604A1

公开(公告)日：2024-06-27

申请号：US18598487

申请日：2024-03-07

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/52 ,  H04N19/176 ,  H04N19/186

CPC classification number: H04N19/52 ,  H04N19/176 ,  H04N19/186

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: stores MV information and correction processing information into a FIFO buffer for an HMVP mode in association, the MV information being derived for a processed block and correction processing information being related to correction processing of a prediction image of the processed block; registers, in a prediction candidate list for a merge mode, one or more prediction candidates each being a combination of MV information and correction processing information, the prediction candidates including a prediction candidate which is a combination of the motion vector information and the correction processing information stored in the FIFO buffer; and selects a prediction candidate from the prediction candidate list when a current block is to be processed in the merge mode, and performs correction processing of a prediction image of the current block, based on the correction processing information.

公开(公告)号：US12015764B2

公开(公告)日：2024-06-18

申请号：US17585833

申请日：2022-01-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/172 ,  H04N19/174 ,  H04N19/46

CPC classification number: H04N19/105 ,  H04N19/172 ,  H04N19/174 ,  H04N19/46

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes, into a sequence parameter set, a first parameter indicating that a change in a picture size is allowed for any of pictures, determines whether or not a reference picture having a same size as a current picture is available to encode the current picture, and disables temporal motion vector prediction when it is determined that the reference picture having the same size as the current picture is not available.

公开(公告)号：US11997271B2

公开(公告)日：2024-05-28

申请号：US17987633

申请日：2022-11-15

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Sughosh Pavan Shashidhar ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/119 ,  H04N19/157 ,  H04N19/176

CPC classification number: H04N19/119 ,  H04N19/157 ,  H04N19/176

Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.

公开(公告)号：US11956467B2

公开(公告)日：2024-04-09

申请号：US17469748

申请日：2021-09-08

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh ,  Chong Soon Lim ,  Ru Ling Liao ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Jing Ya Li

IPC: H04N19/537 ,  H04N19/119 ,  H04N19/176

CPC classification number: H04N19/537 ,  H04N19/119 ,  H04N19/176

Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.

公开(公告)号：US11936886B2

公开(公告)日：2024-03-19

申请号：US17547608

申请日：2021-12-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/196 ,  H04N19/31 ,  H04N19/46 ,  H04N19/70

CPC classification number: H04N19/196 ,  H04N19/31 ,  H04N19/46 ,  H04N19/70

Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry, for each of temporal sub-layers for temporal scalability different from spatial scalability, stores first parameters into buffering period supplemental enhancement information (SEI) and encodes the first parameters. The first parameters present initial delays in timing to extract data from a coded picture buffer (CPB). The circuitry stores a second parameter into the buffering period SEI and encodes the second parameter. The second parameter indicates a total number of the temporal sub-layers. A value of the second parameter is equal to a value of a third parameter that is encoded into a sequence parameter set and indicates a total number of the temporal sub-layers.

公开(公告)号：US11930206B2

公开(公告)日：2024-03-12

申请号：US18136561

申请日：2023-04-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Sughosh Pavan Shashidhar ,  Han Boon Teo ,  Ru Ling Liao ,  Jing Ya Li ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/52

CPC classification number: H04N19/52

Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.