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公开(公告)号：US12267499B2
公开(公告)日：2025-04-01
申请号：US18403086
申请日：2024-01-03
Inventor： Yusuke Kato , Takahiro Nishi , Tadamasa Toma , Kiyofumi Abe
IPC: H04N19/13 , H04N19/176 , H04N19/46 , H04N19/70 , H04N19/91
Abstract: A decoder includes circuitry and memory. In both of a first type of residual decoding where an inverse orthogonal transform is applied and a second type of residual decoding where the inverse orthogonal transform is skipped, wherein when a restriction on a number of CABAC processes allows CABAC decoding of a set of coefficient information flags, the circuitry: decodes the coefficient information flags by CABAC; and otherwise, the circuitry: skips the CABAC decoding of the coefficient information flags; and the circuitry decodes a remainder value of the coefficient with Golomb-Rice decoding when the coefficient information flags are decoded; and otherwise the circuitry decodes a value of the coefficient with the Golomb-Rice decoding, wherein in the second type of residual decoding, the circuitry decodes absolute value flags each relating to an absolute value of the coefficient after decoding the coefficient information flags and before decoding the remainder value of the coefficient.
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公开(公告)号：US12267263B2
公开(公告)日：2025-04-01
申请号：US18591398
申请日：2024-02-29
Inventor： Yutaka Murakami , Tomohiro Kimura , Mikihiro Ouchi
Abstract: Provided are a frame configuring unit configured to configure a frame using a plurality of orthogonal frequency-division multiplexing (OFDM) symbols, by allocating time resources and frequency resources to a plurality of transmission data, and a transmitter which transmits the frame. The frame includes a first period in which a preamble which includes information on a frame configuration of the frame is transmitted, a second period in which a plurality of transmission data are transmitted by time division, a third period in which a plurality of transmission data are transmitted by frequency division, and a fourth period in which a plurality of transmission data are transmitted by time division and frequency division.
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公开(公告)号：US20250106847A1
公开(公告)日：2025-03-27
申请号：US18728364
申请日：2022-10-04
Inventor： Shotaro MAKI , Tetsuya YAMAMOTO , Hidetoshi SUZUKI , Akihiko NISHIO , Ayako HORIUCHI
IPC: H04W72/1273 , H04L1/08 , H04W72/232
Abstract: This terminal comprises: a reception circuit that receives control information corresponding to a downlink message in a random access procedure; and a control circuit that determines a setting for the repeated transmission of an uplink control signal for the downlink message, on the basis of a value of a field related to a setting different from the setting for the repeated transmission, in the control information.
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公开(公告)号：US20250106418A1
公开(公告)日：2025-03-27
申请号：US18976551
申请日：2024-12-11
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/423 , H04N19/105 , H04N19/176 , H04N19/517
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry performs prediction on an image. A motion vector predictor list used in the prediction includes a spatially neighboring motion vector predictor obtained from a block spatially neighboring a current block, and a spatially broad motion vector predictor obtained from a block positioned at any of a plurality of predetermined positions in a second range that is broader than a first range that spatially neighbors the current block. The plurality of predetermined positions are defined by a regular interval using the top-left of a current picture as a reference point.
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公开(公告)号：US20250106417A1
公开(公告)日：2025-03-27
申请号：US18976662
申请日：2024-12-11
Inventor： Han Boon TEO , Jingying GAO , Chong Soon LIM , Praveen Kumar YADAV , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/42 , H04N19/117 , H04N19/136 , H04N19/172
Abstract: A decoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: decodes a plurality of sets of neural network information each of which identifies a neural network filter; decodes, from one access unit, two or more sets of activation information each of which specifies one set of neural network information among the plurality of sets of neural network information; and applies, to one picture, two or more neural network filters identified by two or more sets of neural network information specified by the two or more sets of activation information.
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Patent Agency Ranking
公开(公告)号：US20250106414A1
公开(公告)日：2025-03-27
申请号：US18975090
申请日：2024-12-10
Inventor： Toshiyasu SUGIO , Noritaka Iguchi
IPC: H04N19/30 , H04N19/184 , H04N19/46 , H04N19/91
Abstract: A three-dimensional data encoding method of encoding three-dimensional points each having an attribute information item includes: classifying each of the three-dimensional points into any of layers including a first layer and a second layer; and arithmetic-encoding an attribute information item of a current three-dimensional point among the three-dimensional points with reference to a first encoding table when the current three-dimensional point is at the first layer, and with reference to a second encoding table not dependent on the first encoding table when the current three-dimensional point is at the second layer.
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公开(公告)号：US20250105919A1
公开(公告)日：2025-03-27
申请号：US18969865
申请日：2024-12-05
Inventor： Yutaka Murakami , Ryutaro Monden , Nobuhiko Hashida
IPC: H04B10/116 , H04N23/66 , H04N23/67
Abstract: A reception device includes: an image sensor that captures an image, and a reception unit configured to sample a plurality of pixels included in each of N (N being an integer greater than or equal to two) regions included in an imaging surface of the image sensor to receive, in parallel, N mutually different optical signals transmitted from a plurality of light sources.
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公开(公告)号：US20250104369A1
公开(公告)日：2025-03-27
申请号：US18973716
申请日：2024-12-09
Inventor： Minami NAKA , Satoshi MATSUI , Tadamasa TOMA
Abstract: An information processing device constructs, in a virtual space, a three-dimensional (3D) model of a target object to be worked on by a worker in a real space, acquires position information and orientation information of the worker in the real space, synchronizes a position and an orientation of a virtual camera in the virtual space with a position and an orientation of the worker based on the position information and the orientation information, generates a virtual camera video which shows the 3D model captured by the synchronized virtual camera, and outputs output information for displaying an output image that includes the virtual camera video.
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公开(公告)号：US12262049B2
公开(公告)日：2025-03-25
申请号：US18545682
申请日：2023-12-19
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N11/02 , H04N19/119 , H04N19/176 , H04N19/52
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US12262004B2
公开(公告)日：2025-03-25
申请号：US17582950
申请日：2022-01-24
Inventor： Che-Wei Kuo , Chong Soon Lim , Jing Ya Li , Han Boon Teo , Hai Wei Sun , Chu Tong Wang , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Yusuke Kato
IPC: H04N19/117 , H04N19/132 , H04N19/159 , H04N19/176 , H04N19/186 , H04N19/82
Abstract: An encoder includes circuitry which generates a first coefficient value by applying a CCALF process to a first reconstructed image sample of a luma component; generates a second coefficient value by applying an ALF process to a second reconstructed image sample of a chroma component; generates a third coefficient value by adding the first coefficient value to the second coefficient value; and encodes a third reconstructed image sample of the chroma component using the third coefficient value. The circuitry writes a first parameter into a sequence parameter set; writes a second parameter into a parameter set of a picture in response to a value of the first parameter being 1; writes a third parameter into a slice header in response to the value of the first parameter being 1; and writes a fourth parameter into a coding tree unit in response to a value of the third parameter being 1.
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