公开(公告)号：US08191025B1

公开(公告)日：2012-05-29

申请号：US12552214

申请日：2009-09-01

Applicant: Michael Chan ,  Paul Leventis ,  David Lewis ,  Ketan Zaveri ,  Hyun Mo Yi ,  Chris Lane

Inventor： Michael Chan ,  Paul Leventis ,  David Lewis ,  Ketan Zaveri ,  Hyun Mo Yi ,  Chris Lane

IPC: G06F17/50 ,  G06F9/00 ,  G06F15/177 ,  H03K19/00 ,  H01L25/00

CPC classification number: H03K19/17764 ,  H03K19/17736

Abstract: An embodiment of the present invention provides a programmable logic device (“PLD”) including a redundancy architecture adapted to selective route signals via first or second staggered vertical lines. Other embodiments provide configuration logic and programs for determining routing selections. Other embodiments provide proximate grouping of vertical lines driven from a same row. Other embodiments provide definition of spare row locations once defective row locations are known.

Abstract translation: 本发明的实施例提供了一种可编程逻辑器件（“PLD”），其包括适于经由第一或第二交错垂直线选择性路由信号的冗余架构。 其他实施例提供用于确定路由选择的配置逻辑和程序。 其他实施例提供从相同行驱动的垂直线的近似分组。 其他实施例提供了一旦有缺陷的行位置是已知的备用行位置的定义。

公开(公告)号：US08185861B2

公开(公告)日：2012-05-22

申请号：US13004587

申请日：2011-01-11

Applicant: David Lewis

Inventor： David Lewis

IPC: G06F9/455

CPC classification number: H03K19/1735

Abstract: The logic cells (HLEs) of a structured application-specific integrated circuit (structured ASIC) can be used to provide memory blocks of various sizes. Any one or more of several techniques may be employed to facilitate doing this for various user designs that may have different requirements (e.g., in terms of size) for such memory blocks. For example, pre-designed macros of memory blocks may be provided and then combined as needed to provide memory blocks of various sizes. Placement constraints may be observed for certain portions of the memory circuitry (e.g., the memory core), while other portions (e.g., address predecoder circuitry, write and read data registers, etc.) may be located relatively freely.

Abstract translation: 结构化专用集成电路（结构化ASIC）的逻辑单元（HLE）可用于提供各种尺寸的存储块。 可以采用几种技术中的一种或多种技术来促进对可能具有针对这种存储块的不同要求（例如，在尺寸方面）的各种用户设计。 例如，可以提供预先设计的存储器块的宏，然后根据需要进行组合以提供各种大小的存储块。 存储器电路的某些部分（例如，存储器核心）可以观察到放置约束，而其他部分（例如，地址预解码器电路，写入和读取数据寄存器等）可以相对自由地定位。

公开(公告)号：US08155645B2

公开(公告)日：2012-04-10

申请号：US12943513

申请日：2010-11-10

Applicant: Allan David Lewis ,  George Dos Santos ,  Russell N. Owen ,  Wen Gao ,  Philip C. Luk ,  David A. Bajar ,  David P. Yach

Inventor： Allan David Lewis ,  George Dos Santos ,  Russell N. Owen ,  Wen Gao ,  Philip C. Luk ,  David A. Bajar ,  David P. Yach

IPC: H04W4/00 ,  H04W36/00

CPC classification number: H04W12/06 ,  H04W88/06

Abstract: A bypass server is placed in an outgoing link between a mobile device server and a relay used to distribute data from the mobile device server to remote mobile devices to which the data is addressed. Where a direct connection is established between a suitably configured network node (such as a personal computer) and a given mobile device, the bypass server may form a local connection with the network node and divert along the local connection those packets that are addressed to the given mobile device. As such, a lower cost/higher bandwidth local communication path between the given mobile device and the mobile device server may be established, when compared to the conventional remote communication path. The local communication path may be especially useful for bulk data transfers.

Abstract translation: 旁路服务器被放置在移动设备服务器和用于将数据从移动设备服务器分发到数据所寻址的远程移动设备的中继器之间的输出链路中。 在适当配置的网络节点（例如个人计算机）和给定的移动设备之间建立直接连接的情况下，旁路服务器可以与网络节点形成本地连接，并沿着本地连接转发那些寻址到 给予移动设备。 因此，与传统的远程通信路径相比，可以建立给定移动设备和移动设备服务器之间的较低成本/更高带宽的本地通信路径。 本地通信路径对于批量数据传输可能特别有用。

公开(公告)号：US08142763B2

公开(公告)日：2012-03-27

申请号：US12023315

申请日：2008-01-31

Applicant: David Lewis ,  David Ganderton ,  Brian Meakin ,  Paolo Ventura ,  Gaetano Brambilla ,  Raffaella Garzia

Inventor： David Lewis ,  David Ganderton ,  Brian Meakin ,  Paolo Ventura ,  Gaetano Brambilla ,  Raffaella Garzia

IPC: A61K9/00 ,  A61K9/08 ,  A61K9/12

CPC classification number: A61K9/008 ,  A61K9/12 ,  A61M15/009 ,  Y10S514/958

Abstract: The invention relates to pressurized metered dose inhalers (MDIs) in which all or part of the internal surface is stainless steel, anodized aluminum, or lined with an inert organic coating and which contain a formulation which comprises ipratropium bromide.

Abstract translation: 本发明涉及加压计量吸入器（MDI），其中内表面的全部或部分是不锈钢，阳极氧化铝或用惰性有机涂层衬里，并含有包含异丙托溴铵的制剂。

公开(公告)号：US08128344B2

公开(公告)日：2012-03-06

申请号：US12265315

申请日：2008-11-05

Applicant: Kevin Thomas McGovern ,  Bryan David Lewis ,  Zachary James Taylor

Inventor： Kevin Thomas McGovern ,  Bryan David Lewis ,  Zachary James Taylor

IPC: F04D31/00

CPC classification number: F01D11/08 ,  B23H9/10 ,  B23H9/14 ,  F05D2230/12 ,  F05D2240/11 ,  F05D2260/201 ,  F05D2260/202 ,  F05D2260/205 ,  F05D2260/2212 ,  F05D2260/22141 ,  Y10T29/49341

Abstract: A turbine cooling component comprising a circumferential leading edge, a circumferential trailing edge, a pair of spaced and opposed side panels connected to the leading and trailing edges, an arcuate base connected to the trailing and leading edges having a fore portion, a midsection portion, an aft portion, opposed side portions, an outer surface partially defining a cavity operative to receive pressurized air, and an arcuate inner surface in contact with a gas flow path of a turbine engine, a first side cooling air passage in the base extending along the first side portion from the fore portion to the aft portion, and a fore cooling air passage in the fore portion of the base communicative with the side cooling air passage and the cavity, operative to receive the pressurized air from the cavity.

Abstract translation: 一种涡轮机冷却部件，包括周向前缘，周向后缘，连接到前缘和后缘的一对间隔和相对的侧片，连接到具有前部的后缘和前缘的弧形底座，中央部分， 后部部分，相对的侧部，部分地限定用于接收加压空气的空腔的外表面和与涡轮发动机的气体流动路径接触的弓形内表面，所述基部中的第一侧冷却空气通道沿着 从前部到后部的第一侧部分，以及与侧面冷却空气通道和空腔相通的基座的前部中的前部冷却空气通道，用于从空腔接收加压空气。

公开(公告)号：US08112678B1

公开(公告)日：2012-02-07

申请号：US11955910

申请日：2007-12-13

Applicant: David Lewis ,  Vaughn Betz

Inventor： David Lewis ,  Vaughn Betz

IPC: G06F11/00

CPC classification number: G06F11/106

Abstract: Systems and methods for detecting and correcting errors in programmable logic ICs are provided. In one embodiment, a scrubber periodically reads the memory cells in a programmable logic IC, detects and corrects any errors, and writes the corrected contents back into the memory cell. In another embodiment, regions of memory cells in a programmable logic IC each have associated error correcting circuitry which operates to continuously detect and correct errors as they occur. Error correcting circuitry can further be designed to reduce static hazards. It may be more desirable to design programmable logic IC routing architectures that reduce the number of memory cells needed to implement a given function. Error correcting circuitry can be provided for configuration memory or for an embedded memory block on a programmable logic IC.

Abstract translation: 提供了用于检测和校正可编程逻辑IC中的错误的系统和方法。 在一个实施例中，洗涤器周期性地读取可编程逻辑IC中的存储器单元，检测和校正任何错误，并将校正的内容写入存储单元。 在另一个实施例中，可编程逻辑IC中的存储器单元的区域各自具有相关联的误差校正电路，其操作以在错误发生时连续地检测和校正错误。 误差校正电路可进一步设计，以减少静电危害。 可能更需要设计可编程逻辑IC路由架构，减少实现给定功能所需的存储器单元的数量。 可以为配置存储器或可编程逻辑IC上的嵌入式存储器块提供纠错电路。

公开(公告)号：USD653192S1

公开(公告)日：2012-01-31

申请号：US29393052

申请日：2011-05-27

Applicant: David Lewis

Designer： David Lewis

公开(公告)号：USD652397S1

公开(公告)日：2012-01-17

申请号：US29392885

申请日：2011-05-27

Applicant: David Lewis

Designer： David Lewis

公开(公告)号：US08008396B2

公开(公告)日：2011-08-30

申请号：US12384420

申请日：2009-04-02

Applicant: William Douglas Rohrbach ,  David Lewis Zimmerman, Jr.

Inventor： William Douglas Rohrbach ,  David Lewis Zimmerman, Jr.

IPC: C08F2/32 ,  C08F283/00 ,  C08K3/20 ,  C08L31/00

CPC classification number: C08F2/24 ,  B01J19/1881 ,  B01J2219/0011 ,  B01J2219/00114 ,  B01J2219/00254 ,  C08F2/01 ,  F28D9/00

Abstract: There is provided a process of emulsion polymerization comprising (a) adding a reactive mixture to a reaction vessel, said reactive mixture comprising water, one or more emulsifier, one or more monomer, and one or more initiator, (b) providing conditions in which said reactive mixture undergoes emulsion polymerization, and (c) passing some of the contents of said reaction vessel through a recirculating loop comprising a low-shear pump and a plate and frame heat exchanger having gap width of 6 to 18 mm, wherein more than 50% of the heat produced by said emulsion polymerization is removed from the contents of said reaction vessel by said plate and frame heat exchanger.

Abstract translation: 提供了一种乳液聚合方法，其包括（a）向反应容器中加入反应性混合物，所述反应混合物包含水，一种或多种乳化剂，一种或多种单体和一种或多种引发剂，（b）提供其中 所述反应性混合物经历乳液聚合，和（c）使所述反应容器的一些内容物通过包括低剪切泵和间隙宽度为6至18mm的板框式热交换器的再循环回路，其中多于50 通过所述板框式热交换器从所述反应容器的内容物中除去所述乳液聚合产生的热量的％。

公开(公告)号：US07982501B2

公开(公告)日：2011-07-19

申请号：US11130334

申请日：2005-05-16

Applicant: David Lewis

Inventor： David Lewis

IPC: H03K19/003

CPC classification number: H03K17/6872 ,  H03K17/08122

Abstract: Low-power routing multiplexers that reduce static and dynamic power consumption are provided. A variety of different techniques are used to reduce power consumption of the routing multiplexers without significantly increasing their size. For example, power consumption of the routing multiplexers may be reduced by reducing short-circuit currents, reducing leakage currents, limiting voltage swing, and recycling charge within the multiplexer. Multiple power reduction techniques may be combined into a single routing multiplexer design. Low-power routing multiplexers may also be designed to operate in selectable modes, such as, a high-speed, high-power mode and a low-speed, low-power mode.

Abstract translation: 提供降低静态和动态功耗的低功耗路由多路复用器。 使用各种不同的技术来降低路由多路复用器的功耗，而不会显着增加它们的大小。 例如，可以通过减少短路电流，减少泄漏电流，限制电压摆幅以及多路复用器内的再循环电荷来减少路由多路复用器的功耗。 多个功率降低技术可以组合成单个路由多路复用器设计。 低功率路由多路复用器也可以被设计为以诸如高速，高功率模式和低速，低功率模式的可选模式操作。