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公开(公告)号：US20080101444A1
公开(公告)日：2008-05-01
申请号：US11966918
申请日：2007-12-28
IPC分类号： H04B1/38
CPC分类号： H04B1/44 , H03K17/92 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： A digital radio frequency switch system and method, adapted to receive a plurality of inputs, generate a plurality of outputs, and simultaneously route a plurality of inputs to any of a plurality of outputs, comprising an array comprising a plurality of inputs, having a plurality of associated clocks; a digital control input adapted to receive a signal indicative of a mapping between at least one of said inputs and at least one respective output; a digital logic array, responsive to said digital control input for simultaneously communicating a plurality of signals each corresponding to one of the plurality of inputs and a respective associated clock to at least one of said outputs indicated by the digital control input; and an array of the outputs, each adapted to present a regenerated signal corresponding to one of the plurality of inputs and a respective associated synchronized regenerated clock maintaining accurate relative timing therebetween.
摘要翻译： 一种适于接收多个输入的数字射频切换系统和方法，产生多个输出，并且同时将多个输入路由到多个输出中的任一个，包括包括多个输入的阵列，具有多个输入 的相关时钟; 数字控制输入，适于接收指示所述输入中的至少一个与至少一个相应输出之间的映射的信号; 数字逻辑阵列，响应于所述数字控制输入，用于同时将与多个输入中的一个输入相对应的多个信号和相应的相关联的时钟传送到由数字控制输入指示的至少一个输出; 以及输出的阵列，每个输出适于呈现对应于所述多个输入中的一个的再生信号和相应的相关联的同步再生时钟，以保持它们之间的准确的相对定时。
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公开(公告)号：US07280623B2
公开(公告)日：2007-10-09
申请号：US10210882
申请日：2002-08-02
CPC分类号： H04B1/001 , H04B1/0003 , H04B1/406 , H04B1/707 , H04B1/713
摘要： Digital RF correlation based signal processing arrangements allow for the development of software—controlled radio reception without the need for down-conversion to IF frequencies. Various arrangements are implemented using superconducting RSFQ logic enabling the clock and processing speeds required.
摘要翻译： 基于数字RF相关的信号处理装置允许开发软件控制的无线电接收，而不需要下变频到IF频率。 使用超导RSFQ逻辑实现各种布置，从而实现所需的时钟和处理速度。
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公开(公告)号：US09020362B2
公开(公告)日：2015-04-28
申请号：US13602516
申请日：2012-09-04
申请人： Deepnarayan Gupta , Oleg Mukhanov
发明人： Deepnarayan Gupta , Oleg Mukhanov
CPC分类号： H04B10/25752 , H04B10/2575 , H04B10/40 , H04B10/5561 , H04B10/697 , H04L27/2096
摘要： A transceiver architecture for wireless base stations wherein a broadband radio frequency signal is carried between at least one tower-mounted unit and a ground-based unit via optical fibers, or other non-distortive media, in either digital or analog format. Each tower-mounted unit (for both reception and transmission) has an antenna, analog amplifier and an electro-optical converter. The ground unit has ultrafast data converters and digital frequency translators, as well as signal linearizers, to compensate for nonlinear distortion in the amplifiers and optical links in both directions. In one embodiment of the invention, at least one of the digital data converters, frequency translators, and linearizers includes superconducting elements mounted on a cryocooler.
摘要翻译： 一种用于无线基站的收发机架构，其中宽带射频信号通过光纤或数字或模拟格式的光纤或其他非失真媒介在至少一个塔式安装单元和基于地面的单元之间承载。 每个塔式装置（用于接收和传输）都具有天线，模拟放大器和电光转换器。 地面单元具有超快数据转换器和数字频率转换器以及信号线性化器，以补偿放大器和光学链路在两个方向上的非线性失真。 在本发明的一个实施例中，至少一个数字数据转换器，频率转换器和线性化器包括安装在低温冷却器上的超导元件。
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公开(公告)号：US08514986B2
公开(公告)日：2013-08-20
申请号：US13013793
申请日：2011-01-25
申请人： Deepnarayan Gupta
发明人： Deepnarayan Gupta
IPC分类号： H03D1/00
CPC分类号： H04B1/123 , H04B1/0028 , H04B1/109 , H04B1/38 , H04L27/2649
摘要： A processor, comprising a first data input configured to receive a stream of samples of a first signal having a spectral space, the stream having a data rate of at least 4 GHz; a second data input configured to receive a stream of samples of a second signal; a multitap correlator, configured to receive the first stream of samples and the second stream of samples, and producing at least one correlation output for each respective sequential sample of the first signal received; and a programmable control configured to alter a relationship of the stream of samples of the first signal and the stream of samples of the second signal, to thereby select, under program control, an alterable correlation output.
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公开(公告)号：US08462889B2
公开(公告)日：2013-06-11
申请号：US11966897
申请日：2007-12-28
申请人： Deepnarayan Gupta
发明人： Deepnarayan Gupta
IPC分类号： H04L27/06
CPC分类号： H04W56/0015 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： A system and method for receiving a RF signal, comprising a device for digitizing, without prior alteration of frequency, an analog RF representation of each of a plurality of RF signals to produce a respective plurality of digital RF signals having a respective associated RF digital clock, the plurality of digital RF signals having a sufficiently high respective associated clock rate to preserve an information content of an information communication present in the analog RF representation; a switch matrix adapted to concurrently switch the plurality of digital RF signals and associated digital RF clock to ones of a plurality of digital signal processors; and a control adapted to selectively automatically control the concurrent switching of a plurality of digital signals and associated digital clock to the respective plurality of digital signal processors; wherein the digital signal processors produce processed representations of information contained in respective analog RF representations.
摘要翻译： 一种用于接收RF信号的系统和方法，包括用于在没有频率改变的情况下数字化用于多个RF信号中的每一个的模拟RF表示的装置，以产生相应的多个数字RF信号，所述数字RF信号具有相应的相关联的RF数字时钟 所述多个数字RF信号具有足够高的相应的相关时钟速率，以保存模拟RF表现中存在的信息通信的信息内容; 适于将多个数字RF信号和相关联的数字RF时钟同时切换到多个数字信号处理器中的数字RF时钟的开关矩阵; 以及控制器，其适于选择性地自动控制多个数字信号和相关联的数字时钟的并发切换到相应的多个数字信号处理器; 其中数字信号处理器产生处理在各模拟RF表示中所包含的信息的表示。
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公开(公告)号：US08401509B1
公开(公告)日：2013-03-19
申请号：US13588582
申请日：2012-08-17
申请人： Deepnarayan Gupta , Amol Inamdar
发明人： Deepnarayan Gupta , Amol Inamdar
IPC分类号： H04B1/10
CPC分类号： H04B1/10 , H04B1/109 , H04B1/525 , H04B7/15585 , H04L27/01
摘要： A radio frequency receiver subject to a large in-band interferor employs active cancellation with coarse and at least one cancellation signals, each with a respective radio frequency combiner, in order to increase the effective dynamic range of the receiver for weak signals of interest. One or both can be digitally synthesized. This is particularly applicable for co-site interference, whereby the interfering transmit signal is directly accessible. A similar system and method may also be applied to external interferors such as those produced by deliberate or unintentional jamming signals, or by strong multipath signals. An adaptive algorithm may be used for dynamic delay and gain matching. In a preferred embodiment, a hybrid technology hybrid temperature system incorporates both superconducting and semiconducting components to achieve enhanced broadband performance.
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公开(公告)号：US20110167241A1
公开(公告)日：2011-07-07
申请号：US13043272
申请日：2011-03-08
CPC分类号： G11C8/10 , Y10S505/831 , Y10S505/837
摘要： A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address decoder and a programmable read-only memory array (PROM). The memory array has rapid parallel pipelined readout and slower serial reprogramming of memory contents. The memory cells are constructed using standard non-destructive reset-set flip-flops (RSN cells) and data flip-flops (DFF cells). An n-bit address decoder is implemented in the same technology and closely integrated with the memory array to achieve high-speed operation as a lookup table. The circuit architecture is scalable to large two-dimensional data arrays.
摘要翻译： 使用快速单通量量子（RSFQ）逻辑元件设计高速查找表，并使用超导集成电路制造。 查找表由地址解码器和可编程只读存储器阵列（PROM）组成。 存储器阵列具有快速的并行流水线读出和较慢的存储器内容的串行重新编程。 使用标准的非破坏性复位触发器（RSN单元）和数据触发器（DFF单元）构建存储单元。 n位地址解码器以相同的技术实现并与存储器阵列紧密集成，以实现作为查找表的高速操作。 电路架构可扩展到大型二维数据阵列。
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公开(公告)号：US07956640B2
公开(公告)日：2011-06-07
申请号：US11966918
申请日：2007-12-28
IPC分类号： H03K19/177
CPC分类号： H04B1/44 , H03K17/92 , H04B1/005 , H04B1/0483 , H04B1/40
摘要： A digital radio frequency switch system and method, adapted to receive a plurality of inputs, generate a plurality of outputs, and simultaneously route a plurality of inputs to any of a plurality of outputs, comprising an array comprising a plurality of inputs, having a plurality of associated clocks; a digital control input adapted to receive a signal indicative of a mapping between at least one of said inputs and at least one respective output; a digital logic array, responsive to said digital control input for simultaneously communicating a plurality of signals each corresponding to one of the plurality of inputs and a respective associated clock to at least one of said outputs indicated by the digital control input; and an array of the outputs, each adapted to present a regenerated signal corresponding to one of the plurality of inputs and a respective associated synchronized regenerated clock maintaining accurate relative timing therebetween.
摘要翻译： 一种适于接收多个输入的数字射频切换系统和方法，产生多个输出，并且同时将多个输入路由到多个输出中的任一个，包括包括多个输入的阵列，具有多个输入 的相关时钟; 数字控制输入，适于接收指示所述输入中的至少一个与至少一个相应输出之间的映射的信号; 数字逻辑阵列，响应于所述数字控制输入，用于同时将与多个输入中的一个输入相对应的多个信号和相应的相关联的时钟传送到由数字控制输入指示的至少一个输出; 以及输出的阵列，每个输出适于呈现对应于所述多个输入中的一个的再生信号和相应的相关联的同步再生时钟，以保持它们之间的准确的相对定时。
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公开(公告)号：US20090232507A1
公开(公告)日：2009-09-17
申请号：US12403326
申请日：2009-03-12
申请人： Deepnarayan Gupta , Oleg Mukhanov
发明人： Deepnarayan Gupta , Oleg Mukhanov
CPC分类号： H04B10/25752 , H04B10/2575 , H04B10/40 , H04B10/5561 , H04B10/697 , H04L27/2096
摘要： A transceiver architecture for wireless base stations wherein a broadband radio frequency signal is carried between at least one tower-mounted unit and a ground-based unit via optical fibers, or other non-distortive media, in either digital or analog format. Each tower-mounted unit (for both reception and transmission) has an antenna, analog amplifier and an electro-optical converter. The ground unit has ultrafast data converters and digital frequency translators, as well as signal linearizers, to compensate for nonlinear distortion in the amplifiers and optical links in both directions. In one embodiment of the invention, at least one of the digital data converters, frequency translators, and linearizers includes superconducting elements mounted on a cryocooler.
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公开(公告)号：US20090002014A1
公开(公告)日：2009-01-01
申请号：US11824419
申请日：2007-06-29
申请人： Deepnarayan Gupta , Amol Inamdar
发明人： Deepnarayan Gupta , Amol Inamdar
IPC分类号： H03K19/195 , H03K17/92
CPC分类号： H03K19/01 , H03F19/00 , H03K11/00 , H03K17/92 , H03K19/1954
摘要： Supercooled electronics often use Rapid Single Flux Quantum (RSFQ) digital circuits. The output voltages from RSFQ devices are too low to be directly interfaced with semiconductor electronics, even if the semiconductor electronics are cooled. Techniques for directly interfacing RSFQ digital circuits with semiconductor electronics are disclosed using a novel inverting transimpedance digital amplifier in conjunction with a non-inverting transimpedance digital amplifier to create a differential transimpedance digital amplifier that permits direct interfacing between RSFQ and semiconductor electronics.
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