公开(公告)号：US07041571B2

公开(公告)日：2006-05-09

申请号：US10708408

申请日：2004-03-01

Applicant: Jay W. Strane

Inventor： Jay W. Strane

IPC: H01L21/76

CPC classification number: H01L23/5222 ,  H01L21/7682 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A dual layer of polymeric material is deposited with a base layer and top layer resist onto an integrated circuit structure with topography. The base layer planarizes the surface and fills in the native topography. The base layer decomposes almost completely when exposed to an oxidizing environment. The top layer contains a high composition of oxidizing elements and is photosensitive. (i.e., the layer can be patterned by exposing normal lithographic techniques.) The patterning allows the creation of escape paths for the decomposition products of the underlying base layer. This structure is decomposed in an oxidizing ambient (or plasma) leaving behind a thin carbon-containing membrane. This membrane layer blocks deposition of future layers, creating air gaps in the structure.

Abstract translation: 聚合物材料的双层沉积有基底层和顶层抗蚀剂到具有形貌的集成电路结构上。 基层平坦化表面并填充原生地形。 当暴露于氧化环境时，基层几乎完全分解。 顶层含有高组分的氧化元素并且是光敏的。 （即，可以通过暴露正常光刻技术来对该层进行图案化）。图案化允许为下层基层的分解产物创建逃生路径。 该结构在氧化环境（或等离子体）中分解，留下薄碳膜。 该膜层阻止未来层的沉积，在结构中产生气隙。

公开(公告)号：US06989317B1

公开(公告)日：2006-01-24

申请号：US10904088

申请日：2004-10-22

Applicant: Carl J. Radens ,  Jay W. Strane

Inventor： Carl J. Radens ,  Jay W. Strane

IPC: H01L21/76

CPC classification number: H01L21/76802 ,  H01L21/76807 ,  H01L21/76808

Abstract: A novel trench etching method for etching trenches of different depths which are self-aligned to one another is presented. The method comprises the steps of (a) creating first and second trenches of a same depth in a dielectric layer, wherein the second trench is wider than the first trench, (b) forming a conformal gapfill layer on top of the dielectric layer such that the conformal gapfill layer is thicker in the first trench than in the second trench, (c) etching back the conformal gapfill layer until a bottom wall of the second trench is exposed to the atmosphere while a bottom wall of the first trench is still covered by the conformal gapfill layer, (d) etching further into the dielectric layer via the second trench. As a result, the second trench is deeper than the first trench.

Abstract translation: 提出了一种用于蚀刻彼此自对准的不同深度的沟槽的新型沟槽蚀刻方法。 该方法包括以下步骤：（a）在电介质层中产生相同深度的第一和第二沟槽，其中第二沟槽比第一沟槽宽，（b）在电介质层的顶部上形成共形间隙填充层，使得 第一沟槽中的保形间隙填充层比第二沟槽厚，（c）蚀刻保形间隙填充层，直到第二沟槽的底壁暴露于大气，同时第一沟槽的底壁仍然被第一沟槽的底壁覆盖 保形间隙填充层，（d）经由第二沟槽进一步蚀刻到介电层中。 结果，第二沟槽比第一沟槽更深。

公开(公告)号：US06887785B1

公开(公告)日：2005-05-03

申请号：US10709564

申请日：2004-05-13

Applicant: David M. Dobuzinsky ,  Carl J. Radens ,  Roy C. Iggulden ,  Jay W. Strane ,  Keith K. H. Wong

Inventor： David M. Dobuzinsky ,  Carl J. Radens ,  Roy C. Iggulden ,  Jay W. Strane ,  Keith K. H. Wong

IPC: H01L21/768 ,  H01L21/4763

CPC classification number: H01L21/76844 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76897

Abstract: A semiconductor device with openings of differing depths in a substrate or layer is described, as are related methods for its manufacture. Through selective deposition of a single mask layer, whereby low aspect ratio openings are substantially coated while high aspect ratio are at most partially coated, subsequent etching of the substrate or layer is restricted to uncoated portions of the high aspect ratio openings. The result is a substrate or layer with openings of more than one depth using a single mask layer. In a second embodiment, the selective deposition of a single mask layer is utilized to etch a layer while protecting underlying structures from etching. In a third embodiment, the selective deposition of a single mask layer is utilized to etch an opening into a layer wherein the opening has a sub-lithographic diameter, i.e., the diameter of the opening is smaller than can be achieved with the particular lithographic technique employed.

Abstract translation: 描述了在衬底或层中具有不同深度的开口的半导体器件，以及用于其制造的相关方法。 通过选择性沉积单个掩模层，由此在高纵横比最多部分涂覆的同时基本上涂覆低纵横比的开口，随后对衬底或层的蚀刻被限制在高纵横比开口的未涂覆部分。 结果是使用单个掩模层的具有多于一个深度的开口的基底或层。 在第二实施例中，使用单个掩模层的选择性沉积来蚀刻层，同时保护下面的结构免受蚀刻。 在第三实施例中，使用单个掩模层的选择性沉积来将开口蚀刻到其中开口具有亚光刻直径的开口，即，开口的直径小于可以用特定光刻技术实现的开口的直径 雇用。