SYSTEM AND METHOD FOR INTEGRATING AND MANAGING DEMAND/RESPONSE BETWEEN ALTERNATIVE ENERGY SOURCES, GRID POWER, AND LOADS
    21.
    发明申请
    SYSTEM AND METHOD FOR INTEGRATING AND MANAGING DEMAND/RESPONSE BETWEEN ALTERNATIVE ENERGY SOURCES, GRID POWER, AND LOADS 审中-公开
    用于整合和管理替代能量来源,网格力和负载之间的需求/响应的系统和方法

    公开(公告)号:US20140285010A1

    公开(公告)日:2014-09-25

    申请号:US14119878

    申请日:2012-05-24

    申请人: D. Kevin Cameron

    发明人: D. Kevin Cameron

    IPC分类号: H02J1/00

    摘要: A system, method, and apparatus for local demand response between alternative-energy power-generators, traditional controlled-energy power-generators, and power-consuming loads coupled to a DC bus are disclosed. As a DC bus operating voltage fluctuates between a minimum bus operating voltage to a maximum bus operating voltage, it triggers different power-generators and different power-consumers each having staggered control voltage ranges that enable them to come on-line or go off-line, depending on the bus operating voltage, thereby providing distributed, autonomous and self-regulating demand response performance. Loads vary from opportunistic loads at high alternative-energy generation scenarios, to necessary loads powered by backup or traditional power-generators for low alternative-energy generation scenarios. Safety limits are provided with voltage limits and foldback limits.

    摘要翻译: 公开了一种用于替代能量发电机,传统的受控能量发电机和耦合到DC总线的功耗负载之间的本地需求响应的系统,方法和装置。 由于直流总线工作电压在最小总线工作电压与最大总线工作电压之间波动,因此触发不同的发电机和不同的功率消耗器,每个功率发生器和不同的功率消耗器都具有交错的控制电压范围,使其能够上线或离线 ,取决于总线工作电压,从而提供分布式,自主性和自调节需求响应性能。 高替代能源发电情景下的机会负荷与替代能源发电方案下备用或传统发电机所需的负荷不同。 安全限值具有电压限制和折返限制。

    Including variability in simulation of logic circuits
    22.
    发明授权
    Including variability in simulation of logic circuits 有权
    包括逻辑电路仿真的可变性

    公开(公告)号:US08478576B1

    公开(公告)日:2013-07-02

    申请号:US13029625

    申请日:2011-02-17

    IPC分类号: G06F17/50 G06G7/62

    摘要: According to various techniques of the present invention, probability models for circuit simulation are generated as linear, piecewise linear, nonlinear, and/or continuous probability waveforms. These waveforms represent probability values for logic levels over some period of time. Probability models are defined according to characteristics of the electronic components being modeled, so as to capture variability in characteristics and performance of logic circuits and their components. The probability waveforms of the present invention can be used to predict circuit component behavior resulting from state changes; a range in response time can be indicated by a probability waveform indicating the probability that the response has taken place at a given time after an input state change. Construction of a probability model for a circuit with interconnected electronic components allows timing problems resulting from variability in component performance to be identified.

    摘要翻译: 根据本发明的各种技术,电路仿真的概率模型被生成为线性,分段线性,非线性和/或连续概率波形。 这些波形表示某段时间内逻辑电平的概率值。 概率模型根据被建模的电子元件的特性来定义,以便捕获逻辑电路及其组件的特性和性能的变化。 本发明的概率波形可用于预测由状态变化引起的电路组件行为; 响应时间的范围可以由指示在输入状态改变之后的给定时间发生响应的概率的概率波形来指示。 用于具有互连电子元件的电路的概率模型的构造允许由要识别的组件性能的变化导致的定时问题。

    System and method for signal delay in an adaptive voltage scaling slack detector
    23.
    发明授权
    System and method for signal delay in an adaptive voltage scaling slack detector 有权
    自适应电压缩放检测器中信号延迟的系统和方法

    公开(公告)号:US07149903B1

    公开(公告)日:2006-12-12

    申请号:US10324997

    申请日:2002-12-18

    IPC分类号: G06F1/26 H03K27/00

    CPC分类号: H03K27/00

    摘要: A system and method for slack determination in a logic integrated circuit. A launch pulse is input to a circular delay loop circuit. The leading edge of the launch pulse causes a pulse to circulate around the circular delay loop. The number of passes made through the loop by the circulating pulse is counted by a latch/counter circuit. A sample pulse is input to the latch/counter circuit to latch the number of pulse circulations at the leading edge of the sample pulse. The pulse circulation count provides delay information in the circuit that may subsequently be used to adjust a supply voltage in the integrated circuit.

    摘要翻译: 一种用于逻辑集成电路中的松弛确定的系统和方法。 一个启动脉冲被输入到一个循环延迟回路中。 发射脉冲的前沿使得脉冲在环形延迟环周围循环。 通过循环脉冲循环进行的通过次数由锁存/计数器电路计数。 采样脉冲被输入到锁存/计数器电路以锁存在采样脉冲的前沿的脉冲循环数。 脉冲循环计数提供电路中的延迟信息,其随后可用于调整集成电路中的电源电压。