公开(公告)号：US5962879A

公开(公告)日：1999-10-05

申请号：US854665

申请日：1997-05-12

Applicant: Byung-Ryul Ryum ,  Deok-Ho Cho ,  Tae-Hyeon Han ,  Soo-Min Lee ,  Kwang-Eui Pyun

Inventor： Byung-Ryul Ryum ,  Deok-Ho Cho ,  Tae-Hyeon Han ,  Soo-Min Lee ,  Kwang-Eui Pyun

IPC: H01L21/331 ,  H01L29/737

CPC classification number: H01L29/66242 ,  H01L29/7378

Abstract: The invention relates to a method for manufacturing a super self-aligned heterojunction bipolar transistor which is capable of miniaturizing an element, simplifying the process step thereof by employing a selective collector epitaxial growth process without using a trench for isolating between elements. According to the invention, isolation between elements is derived by using a mask defining an emitter region and a second spacer. The base layer has multi-layer structure being made of a Si, an undoped SiGe, a SiGe doped a p-type impurity in-situ and Si. Also, the selective epitaxial growth for a base is not required. Thus, it can be less prone to a flow of leakage current or an emitter-base-collector short effect.

Abstract translation: 本发明涉及一种用于制造能够使元件小型化的超自对准异质结双极晶体管的方法，通过采用选择性集电体外延生长工艺简化其工艺步骤，而不使用用于元件间隔离的沟槽。 根据本发明，通过使用限定发射极区域和第二间隔物的掩模来导出元件之间的隔离。 基层具有由Si，未掺杂的SiGe，SiGe原位掺杂p型杂质的Si和Si构成的多层结构。 此外，不需要基底的选择性外延生长。 因此，可能不太容易发生漏电流或发射极 - 基极 - 集电极短路效应。

公开(公告)号：US5897359A

公开(公告)日：1999-04-27

申请号：US987474

申请日：1997-12-09

Applicant: Deok Ho Cho ,  Soo Min Lee ,  Tae Hyeon Han ,  Byung Ryul Ryum ,  Kwang Eui Pyun

Inventor： Deok Ho Cho ,  Soo Min Lee ,  Tae Hyeon Han ,  Byung Ryul Ryum ,  Kwang Eui Pyun

IPC: H01L29/74 ,  H01L21/331 ,  H01L29/737 ,  H01L21/8222

CPC classification number: H01L29/66242 ,  H01L29/7378

Abstract: There is disclosed a method of manufacturing a silicon/silicon germanium heterojunction bipolar transistor having a good conformity and an improved speed characteristic, which includes the steps of sequentially laminating an underlying nitride film, an oxide film, a polycrystalline silicon film and an upper nitride on a semiconductor substrate on which devices are separated and a collector is formed; sequentially etching said upper nitride film and said polycrystalline silicon film using the emitter as a mask, and then forming a side wall nitride film; selectively wet-etching said oxide film to form a side base linker opening; burying said base linker opening with a polycrystalline silicon; oxidizing said polycrystalline silicon film buried into said base linker opening and then removing said oxide film by means of the selective wet-etch process; removing said upper nitride and then forming a silicon/silicon germanium film as a base film on the exposed thereof; and forming an emitter said silicon/silicon germanium film.

Abstract translation: 公开了一种制造具有良好一致性和改进的速度特性的硅/硅锗异质结双极晶体管的方法，其包括以下步骤：将下面的氮化物膜，氧化物膜，多晶硅膜和上部氮化物依次层压在 半导体衬底，器件分离并形成集电极; 使用发射极作为掩模，依次蚀刻所述上部氮化物膜和所述多晶硅膜，然后形成侧壁氮化物膜; 选择性地湿蚀刻所述氧化膜以形成侧基连接器开口; 用多晶硅掩埋所述基底连接器开口; 氧化所述多晶硅膜，所述多晶硅膜埋入所述基底连接器开口中，然后通过选择性湿蚀刻工艺除去所述氧化物膜; 去除所述上部氮化物，然后在其暴露时形成硅/硅锗膜作为基膜; 以及形成所述硅/硅锗膜的发射极。

公开(公告)号：US5895930A

公开(公告)日：1999-04-20

申请号：US891495

申请日：1997-07-11

Applicant: Eung-Gie Oh ,  Jeon-Wook Yang ,  Chul-Soon Park ,  Kwang-Eui Pyun

Inventor： Eung-Gie Oh ,  Jeon-Wook Yang ,  Chul-Soon Park ,  Kwang-Eui Pyun

IPC: H01L31/09 ,  H01L31/0352 ,  H01L29/06

CPC classification number: B82Y20/00 ,  H01L31/035236

Abstract: This invention provides infrared sensing photodetector and a method therefor which provides a structure for effectively absorbing a light incident in a normal direction on a substrate, and a method compatible with existing processes for making integrated circuitry. An infrared sensing photodetector includes a compound semiconductor substrate of a first conductivity type, superlattice areas having implanted impurity ions of a second conductivity type opposite to the compound semiconductor substrate, each being spaced a predetermined distance each other in a selected region of the semiconductor substrate, a first collector area and a first emitter area which are formed in both end portions positioned perpendicular relative to the doped superlattice areas, a first collector electrode and a first emitter electrode formed on the first collector area and the first emitter area, respectively, a second collector area and a second emitter area which are spaced a predetermined distance in a horizontal direction on the doped superlattice area, and a second collector electrode and a second emitter electrode formed on the second collector area and the second emitter area, respectively.

Abstract translation: 本发明提供了一种红外感测光电检测器及其方法，其提供了用于有效吸收在基板上沿正向入射的光的结构，以及与用于制造集成电路的现有工艺兼容的方法。 红外感测光电检测器包括具有第一导电类型的化合物半导体衬底，具有注入的与化合物半导体衬底相反的第二导电类型的杂质离子的超晶格区域，在半导体衬底的选定区域中彼此隔开预定距离， 第一集电极区域和第一发射极区域，其形成在相对于掺杂的超晶格区域垂直定位的两个端部中，第一集电极电极和第一发射极电极分别形成在第一集电区域和第一发射极区域上， 集电极区域和在掺杂超晶格区域上在水平方向上隔开预定距离的第二发射极区域，以及分别形成在第二集电极区域和第二发射极区域上的第二集电极电极和第二发射极电极。