公开(公告)号：US06222415B1

公开(公告)日：2001-04-24

申请号：US09494403

申请日：2000-01-31

Applicant: Takehiko Umeyama ,  Toru Takeuchi

Inventor： Takehiko Umeyama ,  Toru Takeuchi

IPC: H03F345

CPC classification number: H03F3/45278 ,  G11B5/012 ,  G11B5/02 ,  G11B5/40 ,  G11B2005/0018 ,  H03F3/45991

Abstract: In the bias circuit of a magneto-resistive element signal amplifying circuit, a favorable high frequency characteristic is obtained by suppressing the influence of a parasitic capacitance that is generated. Furthermore, noise is removed by a lowpass filter including a resistor and a capacitor having a relatively small size in an integrated circuit.

Abstract translation: 在磁阻元件信号放大电路的偏置电路中，通过抑制所产生的寄生电容的影响，获得良好的高频特性。 此外，在集成电路中通过包括电阻器和具有相对较小尺寸的电容器的低通滤波器去除噪声。

公开(公告)号：US06211736B1

公开(公告)日：2001-04-03

申请号：US09461328

申请日：1999-12-15

Applicant: Toru Takeuchi ,  Takehiko Umeyama

Inventor： Toru Takeuchi ,  Takehiko Umeyama

IPC: H03F345

CPC classification number: G11B5/02 ,  G11B5/012 ,  G11B2005/0016

Abstract: A signal amplifying circuit has a differential amplifying circuit, a capacitor and a voltage follower. This circuit takes as input signal the signals outputted from the two terminals of an MR element to which a bias electric current is supplied, and amplifies and outputs the difference in input signals from output terminals. One input terminal of this circuit is connected directly with one of the terminals of the MR element. A capacitor connects the other input terminal of this circuit with the another terminal of the MR element. The two input terminals of this circuit are connected respectively with a non-inverting input terminal and an inverting input terminal of the voltage follower. The voltage follower provides an output to an input terminal of this circuit via a resistance.

Abstract translation: 信号放大电路具有差分放大电路，电容器和电压跟随器。 该电路将来自提供偏置电流的MR元件的两个端子的信号作为输入信号，并放大并输出来自输出端子的输入信号的差值。 该电路的一个输入端子与MR元件的一个端子直接连接。 电容器将该电路的另一输入端与MR元件的另一端连接。 该电路的两个输入端子分别与电压跟随器的非反相输入端子和反相输入端子连接。 电压跟随器通过电阻向该电路的输入端提供输出。

公开(公告)号：US06201421B1

公开(公告)日：2001-03-13

申请号：US09349226

申请日：1999-07-08

Applicant: Toru Takeuchi ,  Takehiko Umeyama

Inventor： Toru Takeuchi ,  Takehiko Umeyama

IPC: H03B100

CPC classification number: G11B5/022 ,  G11B5/012 ,  G11B5/02 ,  G11B5/09 ,  H03K17/567 ,  H03K17/662 ,  H03K17/6872

Abstract: A write current driving circuit in which drains of the transistors A1 and B1 are commonly connected to the base of the transistor T1, drains of the transistors C1 and D1 are commonly connected to the base of the transistor T2, inverted signal of the input signal into the transistors C1 and D1 is inputted into the transistors A1 and B1. Therefore, the transistors T1 and T2 can speedily be switched ON/OFF with suppressed power consumption. Transistors A2, C2 and transistors B2, D2 are connected in parallel with the transistors A1, C1 and NMOS transistors B1, D1 respectively, and the transistors A2, C2, B2, and D2 are turned ON only for a specified period of time immediately after the transistors T1 and T2 are switched ON/OFF.

Abstract translation: 写入电流驱动电路，其中晶体管A1和B1的漏极共同连接到晶体管T1的基极，晶体管C1和D1的漏极共同连接到晶体管T2的基极，将输入信号的反相信号连接到 晶体管C1和D1被输入到晶体管A1和B1中。 因此，晶体管T1和T2可以通过抑制功耗快速地接通/断开。 晶体管A2，C2和晶体管B2，D2分别与晶体管A1，C1和NMOS晶体管B1，D1并联连接，并且晶体管A2，C2，B2和D2仅在紧随着指定的时间段之后导通 晶体管T1和T2被接通/断开。

公开(公告)号：US08625214B2

公开(公告)日：2014-01-07

申请号：US13224696

申请日：2011-09-02

Applicant: Toru Takeuchi ,  Reza Sharifi

Inventor： Toru Takeuchi ,  Reza Sharifi

IPC: G11B27/36 ,  G11B20/10 ,  G11B15/48

CPC classification number: G11B27/36 ,  G11B5/6076

Abstract: An apparatus comprises a root mean square (‘RMS’) value generator; an integrator coupled to the RMS value generator; a sample and hold switch coupled to an output of the integrator; a capacitor coupled between the sample and hold switch and a ground; an input of the analog to digital convertor (‘ADC’) coupled to the capacitor; an adder coupled to an output of the ADC; a register, wherein an output of the register is coupled to an input of the adder; and wherein an output of the adder is coupled to an input of the register; and a logic coupled to the register for comparing an output of the register to an RMS threshold value for determining whether a touch-down has occurred.

Abstract translation: 一种装置包括均方根（'RMS'）值发生器; 耦合到RMS值发生器的积分器; 耦合到积分器的输出的采样和保持开关; 耦合在采样保持开关和地之间的电容器; 耦合到电容器的模数转换器（“ADC”）的输入; 耦合到ADC的输出的加法器; 寄存器，其中寄存器的输出耦合到加法器的输入; 并且其中所述加法器的输出耦合到所述寄存器的输入; 以及耦合到所述寄存器的逻辑，用于将所述寄存器的输出与RMS阈值进行比较，以用于确定是否发生了向下触发。

公开(公告)号：US20130058201A1

公开(公告)日：2013-03-07

申请号：US13224696

申请日：2011-09-02

Applicant: Toru Takeuchi ,  Reza Sharifi

Inventor： Toru Takeuchi ,  Reza Sharifi

IPC: G11B27/36

CPC classification number: G11B27/36 ,  G11B5/6076

Abstract: An apparatus comprises a root mean square (‘RMS’) value generator; an integrator coupled to the RMS value generator; a sample and hold switch coupled to an output of the integrator; a capacitor coupled between the sample and hold switch and a ground; an input of the analog to digital convertor (‘ADC’) coupled to the capacitor; an adder coupled to an output of the ADC; a register, wherein an output of the register is coupled to an input of the adder; and wherein an output of the adder is coupled to an input of the register; and a logic coupled to the register for comparing an output of the register to an RMS threshold value for determining whether a touch-down has occurred.

Abstract translation: 一种装置包括均方根（RMS）值发生器; 耦合到RMS值发生器的积分器; 耦合到积分器的输出的采样和保持开关; 耦合在采样保持开关和地之间的电容器; 耦合到电容器的模数转换器（ADC）的输入; 耦合到ADC的输出的加法器; 寄存器，其中所述寄存器的输出耦合到所述加法器的输入; 并且其中所述加法器的输出耦合到所述寄存器的输入; 以及耦合到所述寄存器的逻辑，用于将所述寄存器的输出与RMS阈值进行比较，以用于确定是否发生了向下触发。

公开(公告)号：US20110269385A1

公开(公告)日：2011-11-03

申请号：US13095721

申请日：2011-04-27

Applicant: Hiroshi Abe ,  Toru Takeuchi

Inventor： Hiroshi Abe ,  Toru Takeuchi

IPC: G07D1/00

CPC classification number: G07D9/008

Abstract: The compact coin hopper for holding and dispensing coins in bulk includes a rotable disk for releasing individual coins to a sliding base beneath the rotable disk for ejection from the coin hopper. The upper surface of the rotable disk includes an upper step part and a lower step part connected by a riser part. The upper step part has a crescent arc shape with a radii smaller than the radius of the rotating disk in a planar view. One end of the crescent arc shape terminates adjacent an edge of the through hole while the other end of the crescent arc shape diverges away from the through hole and terminates adjacent a peripheral side edge of the lower step part. The configuration of the upper and lower step parts and the riser part assist in dispensing a coin.

Abstract translation: 用于容纳和分发硬币的紧凑型硬币盒包括用于将单个硬币释放到可旋转盘下方的滑动基座的用于从硬币漏斗排出的可旋转盘。 可旋转盘的上表面包括上台阶部分和由提升部分连接的下台阶部分。 在俯视图中，上台阶部具有半径小于旋转盘的半径的月牙形。 新月形弧形的一端在通孔的边缘附近终止，而新月形弧形的另一端从通孔分开，并且在下阶梯部的周边侧缘附近终止。 上下台阶部件和提升部件的配置有助于分配硬币。

公开(公告)号：US20080285168A1

公开(公告)日：2008-11-20

申请号：US11848849

申请日：2007-08-31

Applicant: Moomu Hashizume ,  Hiroyuki Mukai ,  Naoko Jinguji ,  Toru Takeuchi

Inventor： Moomu Hashizume ,  Hiroyuki Mukai ,  Naoko Jinguji ,  Toru Takeuchi

IPC: G11B15/18

CPC classification number: G11B5/56

Abstract: Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier are described. One example method of detecting head position in a hard-disk drive includes obtaining a read signal from a head reading information from a disk; determining a signal envelope of the read signal; comparing the signal envelope to a first threshold to produce a first comparison; filtering the signal envelope; comparing the filtered signal envelope to a second threshold to produce a second comparison; combining the first comparison and the second comparison; and determining if the combination of the first comparison and the second comparison indicates head position oscillation.

Abstract translation: 描述了在前置放大器中执行硬盘驱动器头部邻近检测的方法和装置。 检测硬盘驱动器中的磁头位置的一个示例性方法包括从磁头读取信息获得读取信号; 确定读信号的信号包络; 将信号包络与第一阈值进行比较以产生第一比较; 过滤信号包络; 将经滤波的信号包络与第二阈值进行比较以产生第二比较; 结合第一次比较和第二次比较; 以及确定第一比较和第二比较的组合是否指示头位置振荡。

公开(公告)号：US07344014B2

公开(公告)日：2008-03-18

申请号：US10797950

申请日：2004-03-10

Applicant: Toru Takeuchi

Inventor： Toru Takeuchi

IPC: G07F7/04

CPC classification number: G07D11/0039 ,  G07D11/0012 ,  G07D11/0045

Abstract: A banknote condition detection device for a banknote storing unit where the banknote storing unit can be removably positioned within a banknote receiving unit. The banknote storing unit receives a banknote from the banknote receiving unit into the banknote storing unit. The received banknote is moved by a moving unit within the banknote storing unit for storing the received banknote within the storing unit. Each of the stored banknotes is aligned together in a stack within the storing unit. The storing unit includes a plurality of optical guide units each having a receiving surface, and each positioned at the surface of the storing unit. A plurality of optical emitter-receiver pair units are positioned within the banknote receiving unit opposite the plurality of optical guide units, each optical emitter-receiver pair unit is positioned to send light to and receive light from a predetermined optical guide unit.

Abstract translation: 一种用于钞票存储单元的纸币状态检测装置，其中纸币存储单元可拆卸地定位在纸币接收单元内。 纸币存储单元从纸币接收单元接收到纸币存储单元的纸币。 所接收的纸币由纸币存储单元内的移动单元移动，用于将收到的纸币存储在存储单元内。 所存储的纸币中的每一个在存储单元内的堆叠中对齐在一起。 存储单元包括多个光导单元，每个光导单元具有接收表面，并且各自定位在存储单元的表面。 多个光发射器 - 接收器对单元位于与多个光导单元相对的纸币接收单元内，每个光发射器 - 接收器对单元被定位成向预定的光导单元发送光并从其接收光。

公开(公告)号：US07251091B2

公开(公告)日：2007-07-31

申请号：US10748985

申请日：2003-12-30

Applicant: Toru Takeuchi ,  Motomu Hashizume

Inventor： Toru Takeuchi ,  Motomu Hashizume

IPC: G11B5/03

CPC classification number: G11B5/012 ,  G11B5/02 ,  G11B2005/0018

Abstract: The present invention provides a current-sense bias circuit for use with a magnetoresistive head. In one embodiment, the current-sense bias circuit includes a voltage biasing portion configured to provide a bias voltage across the magnetoresistive head thereby establishing a bias current through the magnetoresistive head. Additionally, the current-sense bias circuit also includes a current sensing portion coupled to the voltage biasing portion and configured to sense a change in the bias current based on a resistivity change of the magnetoresistive head.

Abstract translation: 本发明提供一种与磁阻头一起使用的电流检测偏置电路。 在一个实施例中，电流检测偏置电路包括电压偏置部分，其被配置为在磁阻磁头两端提供偏置电压，从而建立通过磁阻头的偏置电流。 另外，电流检测偏置电路还包括耦合到电压偏置部分并被配置为基于磁阻头的电阻率变化来感测偏置电流的变化的电流感测部分。

公开(公告)号：US20070127149A1

公开(公告)日：2007-06-07

申请号：US11292479

申请日：2005-12-02

Applicant: Toru Takeuchi ,  Reza Sharifi ,  Indumini Ranmuthu

Inventor： Toru Takeuchi ,  Reza Sharifi ,  Indumini Ranmuthu

IPC: G11B5/02 ,  G11B5/09

CPC classification number: G11B5/02 ,  G11B2005/0013

Abstract: A reader input amplifier for a hard disk drive including a gm-amp that compensates for any X-Y imbalance to reduce an excursion, and the time period of the excursion until a final settling point.

Abstract translation: 一种用于硬盘驱动器的读取器输入放大器，包括补偿任何X-Y不平衡以减少偏移的gm放大器，以及偏移的时间段直到最终稳定点。