Preamplifier common-mode noise rejection for two-dimensional magnetic recording
    2.
    发明授权
    Preamplifier common-mode noise rejection for two-dimensional magnetic recording 有权
    用于二维磁记录的前置放大器共模噪声抑制

    公开(公告)号:US09431050B1

    公开(公告)日:2016-08-30

    申请号:US14928399

    申请日:2015-10-30

    摘要: An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals.

    摘要翻译: 一种用于二维磁记录的装置包括具有多个磁阻读取传感器的阵列读取器,其被配置为从存储介质读取数据。 磁阻读取传感器具有多个连接端子,其中至少一个连接端子由多于一个的磁阻读取传感器共享。 该装置还包括连接到连接端子的多个低噪声放大器,每个低噪声放大器被配置为放大来自不同的磁阻读取传感器的差分信号。 该装置还包括连接到连接终端的子集的多个阻抗平衡网络。

    ANALOG TUNNELING CURRENT SENSORS FOR USE WITH DISK DRIVE STORAGE DEVICES
    4.
    发明申请
    ANALOG TUNNELING CURRENT SENSORS FOR USE WITH DISK DRIVE STORAGE DEVICES 有权
    用于磁盘驱动存储设备的模拟隧道式电流传感器

    公开(公告)号:US20130235487A1

    公开(公告)日:2013-09-12

    申请号:US13674308

    申请日:2012-11-12

    申请人: LSI CORPORATION

    IPC分类号: G11B21/02 H03F3/45

    摘要: Amplifier architectures are provided for current sensing applications. An amplifier includes a load device, an operational amplifier, a current source, and a bipolar transistor. The operational amplifier has a first input terminal connected to a first input node that receives an input current, and a second input terminal connected to a second input node that receives a reference voltage. The current source is connected to an output of the operational amplifier. The operational amplifier, the current source, and the bipolar transistor form a feedback loop that generates and maintains a bias voltage on the first input node based on the reference voltage applied to the second input node. The bipolar transistor amplifies the input current received on the first input node, and generates an amplified input current. The load device converts the amplified input current to an output voltage, wherein the output voltage is used to sense the input current.

    摘要翻译: 为电流检测应用提供放大器架构。 放大器包括负载装置,运算放大器,电流源和双极晶体管。 运算放大器具有连接到接收输入电流的第一输入节点的第一输入端子和连接到接收参考电压的第二输入节点的第二输入端子。 电流源连接到运算放大器的输出端。 运算放大器,电流源和双极晶体管形成反馈回路,其基于施加到第二输入节点的参考电压产生并维持第一输入节点上的偏置电压。 双极晶体管放大在第一输入节点上接收的输入电流,并产生放大的输入电流。 负载装置将放大的输入电流转换为输出电压,其中输出电压用于感测输入电流。

    Vertical cell edge junction magnetoelectronic device family
    6.
    发明授权
    Vertical cell edge junction magnetoelectronic device family 有权
    垂直单元边缘连接磁电子器件系列

    公开(公告)号:US08125011B2

    公开(公告)日:2012-02-28

    申请号:US12622366

    申请日:2009-11-19

    申请人: Mark B Johnson

    发明人: Mark B Johnson

    IPC分类号: H01L29/76

    摘要: Magnetoelectronic devices are fabricated by joining the edge of one ferromagnetic thin film element with the top, or bottom, portion of a second ferromagnetic, or nonmagnetic, thin film element. The devices also employ a new operational geometry in which the transport of bias current is in the film plane of at least one of the thin film elements, but is substantially perpendicular to the film plane of at least one of the thin film elements. Additionally, any of the variety magnetoelectronic devices (e.g., current-in-plane spin valves, current-perpendicular-to-the-plane spin valves, magnetic tunnel junctions, and lateral spin valves can be fabricated using these features.

    摘要翻译: 磁电子器件通过将一个铁磁性薄膜元件的边缘与第二铁磁性或非磁性薄膜元件的顶部或底部部分接合来制造。 这些器件还采用新的工作几何形状,其中偏置电流的传输在至少一个薄膜元件的膜平面内,但基本上垂直于至少一个薄膜元件的膜平面。 另外,可以使用这些特征来制造各种各样的磁电子器件(例如,平面内自旋阀,电流 - 垂直于平面的自旋阀,磁隧道结和横向自旋阀)中的任何一种。

    Analog multiplexer circuits and methods
    7.
    发明授权
    Analog multiplexer circuits and methods 有权
    模拟多路复用器电路和方法

    公开(公告)号:US08111094B2

    公开(公告)日:2012-02-07

    申请号:US12829129

    申请日:2010-07-01

    IPC分类号: H03K17/00

    摘要: A sample and hold circuit is disclosed that provides longer hold times. An analog multiplexer circuit is also disclosed that exhibits low switch leakage. The analog multiplexer circuit comprises a shared node, a plurality of input circuits, a control input for selecting one or more of the plurality of input circuits, and an amplifier coupled to the shared node. Each input circuit comprises an input node, a primary input switch for selectively coupling an input to the input node, and a secondary input switch for selectively coupling the input node to the shared node, wherein the secondary input switch comprises one or more transistor switches. The parasitic drain and source diodes of one or more transistor switches in secondary input switch in a selected input circuit are coupled to a voltage that is distinct from an input signal of the selected input circuit. For input circuits not selected, the parasitic drain and source diodes of secondary input switch transistor switches are coupled to an output of the amplifier.

    摘要翻译: 公开了一种提供较长保持时间的采样和保持电路。 还公开了一种显示低开关泄漏的模拟多路复用器电路。 模拟多路复用器电路包括共享节点,多个输入电路,用于选择多个输入电路中的一个或多个的控制输入以及耦合到共享节点的放大器。 每个输入电路包括输入节点,用于选择性地将输入耦合到输入节点的主输入开关和用于选择性地将输入节点耦合到共享节点的次级输入开关,其中辅助输入开关包括一个或多个晶体管开关。 所选输入电路中的次级输入开关中的一个或多个晶体管开关的寄生漏极和源极二极管被耦合到与选择的输入电路的输入信号不同的电压。 对于未选择的输入电路,次级输入开关晶体管开关的寄生漏极和源极二极管耦合到放大器的输出端。

    Calibration circuit for voltage mode biasing of magnetoresistive heads
    9.
    发明授权
    Calibration circuit for voltage mode biasing of magnetoresistive heads 有权
    磁阻头的电压模式偏置校准电路

    公开(公告)号:US07800854B1

    公开(公告)日:2010-09-21

    申请号:US11899111

    申请日:2007-09-04

    申请人: Kee Hian Tan Kan Li

    发明人: Kee Hian Tan Kan Li

    IPC分类号: G11B5/03

    CPC分类号: G11B5/455 G11B2005/0018

    摘要: A system for calibrating a magneto-resistive (MR) head includes a biasing circuit and a calibration module. The biasing circuit generates a first current to bias a first head during a calibration mode and a calibrated current to bias the MR head during an operating mode. The calibration module calibrates the first current during the calibration mode by adjusting the first current using nonlinear steps to determine the calibrated current.

    摘要翻译: 用于校准磁阻(MR)头的系统包括偏置电路和校准模块。 偏置电路在校准模式期间产生第一电流以偏置第一头,并且在操作模式期间产生校准电流以偏置MR头。 校准模块通过使用非线性步骤调整第一个电流来校准第一个电流,以校准电流。

    Timing insensitive method and apparatus for spectral analysis in a disk recording system
    10.
    发明授权
    Timing insensitive method and apparatus for spectral analysis in a disk recording system 失效
    磁盘记录系统中光谱分析的时序不灵敏的方法和装置

    公开(公告)号:US07742251B2

    公开(公告)日:2010-06-22

    申请号:US12150810

    申请日:2008-04-30

    IPC分类号: G11B5/09

    摘要: A hard disk drive that includes a disk that contains at least one signal and a head that is coupled to the disk. The disk drive also contains a circuit that includes a data sampler that generates a plurality of data samples from the signal, a harmonic sensor coupled to the data sampler and a spectral power accumulator coupled to the harmonic sensor. The harmonic sensor accumulates the data samples. The circuit includes a window generator that determines a window length of the data samples accumulated by the harmonic sensor. The spectral power accumulator accumulates the windows of sample data accumulated by the harmonic sensor. The sample data accumulated by the spectral power accumulator can be accessed by a processor that performs a spectral analysis of the data.

    摘要翻译: 一个硬盘驱动器,其中包含一个至少包含一个信号的磁盘和一个耦合到磁盘的磁头。 磁盘驱动器还包含电路,该电路包括从信号产生多个数据样本的数据采样器,耦合到数据采样器的谐波传感器和耦合到谐波传感器的频谱功率累加器。 谐波传感器累积数据样本。 该电路包括窗口发生器,其确定由谐波传感器累积的数据样本的窗口长度。 光谱功率累加器累积由谐波传感器累积的采样数据的窗口。 由频谱功率累加器积累的采样数据可以由执行数据的频谱分析的处理器来访问。