摘要:
Capacitive transducer systems are disclosed that reduce nonlinearities due to feedthrough capacitances or residual electrostatic forces. The systems can include a core with a first input coupled to a first variable capacitor, a second input coupled to a second variable capacitor, and a core output coupled to a common node; an amplifier with input switchably coupled to common node and an output; a feedback path switchably coupling amplifier output to common node; and a main clock with first and second phases, that controls switches coupling system components. When clock is in first phase, first core input is coupled to reference voltage, second core input is coupled to negative reference voltage, and common node is coupled to amplifier output. When clock is in second phase, core inputs are grounded, and common node is coupled to amplifier input. The system can have single amplifier. Neutralization capacitor can cancel feedthrough and parasitic capacitances.
摘要:
A capacitive transducer and a readout circuit for processing a signal from a capacitive transducer. The readout circuit includes a high gain circuit element, two summing amplifiers and two feedback path. The high gain circuit element generates an amplified transducer signal, and the summing amplifiers sum the amplified transducer signal with a positive reference voltage and the negative reference voltage, respectively, to generate a first summation signal and a second summation signal. The feedback paths feed back the summation signals to the transducer. Output circuitry generates an output signal based on the summation signals. The high gain circuit element can be a a switched capacitor integrator. The output circuitry can generates the output signal based on the first and second summation signals.