摘要:
A system and method are disclosed for automatically calibrating capacitive transducers to neutralize feed-through capacitance using linear actuation. The method includes starting with an initial neutralization capacitance, applying no electrostatic force and two known electrostatic forces to a proof mass of the transducer, recording the transducer output changes due to the applied forces; and determining how to revise neutralization capacitance based on the changes. The method can use a binary search to find a final neutralization capacitance providing the best linearity. The method can include comparing the final linearity to a threshold linearity. The electrostatic forces can be applied using a charge control method where the electrostatic force is a linear function of the actuation duration. The linear actuation can be used for continuous self-test of capacitive sensors.
摘要:
A differential capacitive transducer system is disclosed that includes first and second capacitive cores and a chopping system. The first core a first input coupled to a first capacitor, a second input coupled to a second capacitor, and a first output. The second core includes a third input coupled to a third capacitor, a fourth input coupled to a fourth capacitor, and a second output. The chopping system has first and fourth inputs coupled to positive signals, and second and third inputs coupled to negative signals. As the chopping system switches between high and low states, it couples the core inputs to different polarity signals reducing charge buildup. The different polarity signals can have substantially same magnitudes. Chopper clock and main clock frequencies can be selected to provide substantially zero average voltages at the core inputs. The system can include an integrator circuit and differential summing circuits.
摘要:
Embodiments of a system for processing a signal may include a receiver configured to receive an input analog signal and an up converter coupled with the receiver and configured to up convert the analog signal to an up converted analog signal. Embodiments may further include an amplifier coupled with the up converter and configured to amplify the up converted analog signal to generate an amplified signal and also a bandpass filter coupled with the amplifier and configured to filter the amplified signal to generate a filtered analog signal. According to embodiments, the filtered analog signal may be fed to a quanitizer of the ADC. Intermediate signals made thus avoid the flicker noise region typically associated with an integrator of the ADC and may minimize the quantization noise associated with converting higher frequency analog signals.
摘要:
A chopping transconductor includes an transconductor input stage coupled with input signals of the chopping transconductor; a chopping switch coupled with an output of the transconductor input stage, the chopping switch having a switch output; and a cascode transistor, wherein the switch output is coupled to an output of the chopping transconductor through the cascode transistor. The chopping transconductor may be used in an analog-to-digital converter to isolate chopping switches from junctions with quantization noise.
摘要:
Various systems and methods for low power identification are described herein. For example, a radio frequency device including a radio frequency energy receiver. The radio frequency energy receiver is operable to receive a radio frequency energy and to convert the radio frequency energy to a DC current. In addition, the device further includes a first clock generator that generates a first clock at a first frequency and second clock generator that generates another clock based on the first clock. The first clock generator includes a duty cycle correction circuit. The second clock has a positive going clock edge for each edge of the first clock.
摘要:
A voltage regulation circuit for an RFID circuit having a voltage limiter circuit including a current sensing element for sensing current through the voltage limiter circuit. The voltage limiter generates a limited voltage. A voltage regulator is coupled to the limited voltage for generating a regulated output voltage. The voltage regulator has a dynamic biasing current responsive to an output of the sensing element for increasing bandwidth of the voltage regulator when current in the voltage limiter circuit increases.
摘要:
A capacitive transducer and a readout circuit for processing a signal from a capacitive transducer. The readout circuit includes a high gain circuit element, two summing amplifiers and two feedback path. The high gain circuit element generates an amplified transducer signal, and the summing amplifiers sum the amplified transducer signal with a positive reference voltage and the negative reference voltage, respectively, to generate a first summation signal and a second summation signal. The feedback paths feed back the summation signals to the transducer. Output circuitry generates an output signal based on the summation signals. The high gain circuit element can be a switched capacitor integrator. The output circuitry can generates the output signal based on the first and second summation signals.
摘要:
A capacitive sensor system and method resistant to electromagnetic interference is disclosed. The system includes a capacitive core, differential amplifier with inverting and non-inverting inputs, capacitive paths, and chopping system. Core can include inputs and outputs coupled to variable capacitors, and common nodes coupling variable capacitors. Capacitive paths couple core outputs to amplifier inputs. When chopping system is high, one polarity voltage is applied to core inputs, a first core output is coupled to the inverting input and a second core output is coupled to the non-inverting input. When the chopping system is low, opposite polarity voltage is applied to core inputs, and core output to amplifier input couplings are flipped. Capacitive paths can include bond wires. Chopping system can be varied between high and low at frequencies that smear noise away from a frequency band of interest, or that smear noise substantially evenly across a wide frequency range.
摘要:
Capacitive transducer systems are disclosed that reduce nonlinearities due to feedthrough capacitances or residual electrostatic forces. The systems can include a core with a first input coupled to a first variable capacitor, a second input coupled to a second variable capacitor, and a core output coupled to a common node; an amplifier with input switchably coupled to common node and an output; a feedback path switchably coupling amplifier output to common node; and a main clock with first and second phases, that controls switches coupling system components. When clock is in first phase, first core input is coupled to reference voltage, second core input is coupled to negative reference voltage, and common node is coupled to amplifier output. When clock is in second phase, core inputs are grounded, and common node is coupled to amplifier input. The system can have single amplifier. Neutralization capacitor can cancel feedthrough and parasitic capacitances.
摘要:
A capacitive transducer and a readout circuit for processing a signal from a capacitive transducer. The readout circuit includes a high gain circuit element, two summing amplifiers and two feedback path. The high gain circuit element generates an amplified transducer signal, and the summing amplifiers sum the amplified transducer signal with a positive reference voltage and the negative reference voltage, respectively, to generate a first summation signal and a second summation signal. The feedback paths feed back the summation signals to the transducer. Output circuitry generates an output signal based on the summation signals. The high gain circuit element can be a a switched capacitor integrator. The output circuitry can generates the output signal based on the first and second summation signals.