摘要:
A liquid crystal display and a method of driving the same are disclosed. A timing controller of the liquid crystal display controls a polarity control signal to have a different phase in each frame and allows liquid crystal cells to be divided into a first liquid crystal cell group charged to a data voltage of a same polarity during two frame periods and a second liquid crystal cell group charged during a current frame period to the data voltage with a polarity opposite a polarity of the data voltage charged during a previous frame period. The liquid crystal cells belonging to the first liquid crystal cell group are successively charged to the data voltage of the same polarity during three or more frame periods at intervals of a predetermined time equal to or longer than two frame periods.
摘要:
A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a liquid crystal display panel, a data drive circuit, a gate drive circuit, and a timing controller. The data drive circuit generates a pre-charge data voltage during pre-charge time and generates a real-charge voltage to be displayed on the liquid crystal display panel during real-charge time. The gate drive circuit supplies a first gate pulse synchronized with the pre-charge data voltage to the gate lines during the pre-charge time while shifting a gate pulse in a downward direction and an upward direction depending on an up/down signal, and then supplies a second gate pulse synchronized with the real-charge data voltage to the gate lines from a falling edge of the first gate pulse at intervals equal to or longer than scanning time of 1 line during the real-charge time.
摘要:
A liquid crystal display and a method of driving the same are provided. The liquid crystal display includes a liquid crystal display panel including data lines, gate lines crossing the data lines, and liquid crystal cells and having a quad type pixel structure in which red, green, blue, and white subpixels constitute one pixel, a logic circuit sequentially outputting polarity control signals, a data drive circuit that inverts a polarity of a data voltage in response to the polarity control signals to supply the data voltage with the inverted polarity to the data lines, and a gate drive circuit sequentially supplying gate pulses to the gate lines. A logic level of each of the polarity control signals is inverted every three horizontal periods, and phases of the polarity control signals are different from one another.
摘要:
A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a timing signal multiplying circuit generating a first timing signal and a second timing signal whose frequency is higher than a frequency of the first timing signal, a frame counter detecting a multiplied frame period to be driven at the frequency of the second timing signal, a data processing circuit allowing a frequency of digital data output during the multiplied frame period to be higher than a frequency of the digital data output during a frame period except the multiplied frame period, a timing control signal generating circuit generating a polarity control signal for controlling polarities of the digital data, and a polarity control signal inverting circuit that increases a frequency of the polarity control signal during the multiplied frame period to generate an inverse polarity control signal.
摘要:
A liquid crystal display (LCD) capable of improving display quality and a method of driving the same are provided. The LCD comprises an LCD panel including a plurality of data lines and gate lines and liquid crystal cells arranged in a matrix at crossings of the gate lines and the data lines, a driving circuit for supplying a data voltage to the data lines and for supplying a scan pulse to the gate lines, a timing controller for generating a gate start pulse for indicating a start horizontal line in which scanning starts in a one frame period where one screen is displayed, a control clock generator for counting the number of frames using the gate start pulse and for generating a control clock whenever an accumulated count value becomes a multiple of a predetermined value, and a common voltage generating circuit for generating control data of a specific bit based on the control clock and for generating a common voltage whose level varies in stages per predetermined interval using the control data to supply the common voltage to the LCD panel.
摘要:
A liquid crystal display is disclosed. The liquid crystal display includes a liquid crystal display panel including data lines and gate lines crossing one another and a pixel array including liquid crystal cells arranged in a matrix format according to a crossing structure of the data lines and the gate lines, a source drive circuit supplying a data voltage to the data lines through a plurality of output channels, a gate drive circuit sequentially supplying a gate pulse to the gate lines. The liquid crystal display panel includes link lines that respectively connect the data lines to the output channels of the source drive circuit. The source drive circuit includes a plurality of output channel resistors connected between the output channels and the link lines. Each of the output channel resistors includes a variable resistance circuit.
摘要:
A liquid crystal display and a method of driving the same are provided. The liquid crystal display includes a liquid crystal display panel including data lines, gate lines crossing the data lines, and liquid crystal cells and having a quad type pixel structure in which red, green, blue, and white subpixels constitute one pixel, a logic circuit sequentially outputting polarity control signals, a data drive circuit that inverts a polarity of a data voltage in response to the polarity control signals to supply the data voltage with the inverted polarity to the data lines, and a gate drive circuit sequentially supplying gate pulses to the gate lines. A logic level of each of the polarity control signals is inverted every three horizontal periods, and phases of the polarity control signals are different from one another.
摘要:
A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a timing signal multiplying circuit generating a first timing signal and a second timing signal whose frequency is higher than a frequency of the first timing signal, a frame counter detecting a multiplied frame period to be driven at the frequency of the second timing signal, a data processing circuit allowing a frequency of digital data output during the multiplied frame period to be higher than a frequency of the digital data output during a frame period except the multiplied frame period, a timing control signal generating circuit generating a polarity control signal for controlling polarities of the digital data, and a polarity control signal inverting circuit that increases a frequency of the polarity control signal during the multiplied frame period to generate an inverse polarity control signal.
摘要:
A liquid crystal display and a method for driving the same are disclosed. The liquid crystal display includes a timing controller generating a polarity control signal. A logic inverting period of the polarity control signal during frame periods ranging from an Nth frame period among M frame periods to 2 to 4 frame periods following the Nth frame period is longer than a logic inverting period of the polarity control signal in the other frame periods, where N is an integer equal to or larger than 4 and M is larger than N. The liquid crystal cells in one frame period of the M frame periods are charged to the data voltage whose a polarity is opposite to a polarity of the data voltage in a previous frame period of one frame period.
摘要:
The exemplary embodiment relates to a liquid crystal display device. The liquid crystal display panel according to the exemplary embodiment includes: a liquid crystal display panel on which a plurality of data lines cross a plurality of gate lines; a source drive IC that supplies data voltages to the data lines; a gate drive IC that supplies gate pulses to the gate lines; a system board equipped with a scaler that transmits data from the scaler with a first interface specification; an interface board that receives the data according to the first interface specification, and transmitting the data with a second interface specification; and a control board equipped with a timing controller receiving the data in the second interface specification and supplying the data to the source drive IC, and controlling the operating timing of the source drive IC and the gate drive IC; wherein a number of the data transmitting lines required in the second interface specification is less than a number of data transmitting line required in the first interface specification.