公开(公告)号：US20050037610A1

公开(公告)日：2005-02-17

申请号：US10917659

申请日：2004-08-13

Applicant: Yong-Won Cha ,  Kyu-Tae Na

Inventor： Yong-Won Cha ,  Kyu-Tae Na

IPC: C23C14/32 ,  H01L21/762 ,  H01L21/768 ,  A61B8/00

CPC classification number: H01L21/76837 ,  C23C16/045 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/31612 ,  H01L21/76227

Abstract: Methods of filling trenches/gaps defined by circuit elements on an integrated circuit substrate are provided. The methods include forming a first high-density plasma layer on an integrated circuit substrate including at least one trench thereon using a first reaction gas. The first high-density plasma layer is etched using an etch gas including nitrogen fluoride gas (NF3). A second high-density plasma layer is formed on the etched first high-density plasma layer using a second reaction gas including nitrogen fluoride.

Abstract translation: 提供了在集成电路基板上填充由电路元件限定的沟槽/间隙的方法。 所述方法包括使用第一反应气体在其上包括至少一个沟槽的集成电路衬底上形成第一高密度等离子体层。 使用包括氮化氢气体（NF 3）的蚀刻气体蚀刻第一高密度等离子体层。 使用包括氮化氟的第二反应气体，在蚀刻的第一高密度等离子体层上形成第二高密度等离子体层。